FPGA Implementation of Eye Movement Detection Algorithm

In this paper, we propose an simple and efficient VLSI hardware architecture is implemented for eye movement detection. For Eye movement detection reading activity Electrooculography (EOG) signal is considered. Here, for denoising the noisy EOG signal efficient FIR filter and for decomposition of denoised EOG signal an efficient Haar wavelet transform architecture is used respectively. The modified VLSI hardware architecture method detected the saccade (left movement of eye and right movement of eye) and blink efficiently. The hardware architecture of the eye movement detection algorithm functionality is verified by using Xilinx System Generator hardware co-simulation tool. The eye movement detection algorithm is implemented on the ZedBoard FPGA using Xilinx Vivado design suite.