Device-independent randomness generation with sublinear shared quantum resources

In quantum cryptography, device-independent (DI) protocols can be certified secure without requiring assumptions about the inner workings of the devices used to perform the protocol. In order to display nonlocality, which is an essential feature in DI protocols, the device must consist of at least two separate components sharing entanglement. This raises a fundamental question: how much entanglement is needed to run such DI protocols? We present a two-device protocol for DI random number generation (DIRNG) which produces approximatelynbits of randomness starting fromnpairs of arbitrarily weakly entangled qubits. We also consider a variant of the protocol wheremsinglet states are diluted intonpartially entangled states before performing the first protocol, and show that the numbermof singlet states need only scale sublinearly with the numbernof random bits produced. Operationally, this leads to a DIRNG protocol between distant laboratories that requires only a sublinear amount of quantum communication to prepare the devices.

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Doing Better by Getting Worse: Short-Term Forgetting Reduces Repetition Avoidance in Random Number Generation

PsycEXTRA Dataset ◽

10.1037/e699782011-001 ◽

2011 ◽

Author(s):

Devin B. Terhune ◽

Peter Brugger

Keyword(s):

Random Number ◽

Random Number Generation ◽

Short Term ◽

Number Generation ◽

Repetition Avoidance

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Random Number Generation Based on the Rossler Attractor

IEICE Proceeding Series ◽

10.15248/proc.1.272 ◽

2014 ◽

Vol 1 ◽

pp. 272-275 ◽

Cited By ~ 1

Author(s):

Vincent Canals ◽

Antoni Morro ◽

Josep L. Rosselló

Keyword(s):

Random Number ◽

Random Number Generation ◽

Number Generation

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RANDOM NUMBER GENERATION IN NATIVE AND FOREIGN LANGUAGES

Perceptual and Motor Skills ◽

10.2466/pms.98.3.1153-1161 ◽

2004 ◽

Vol 98 (3) ◽

pp. 1153 ◽

Cited By ~ 2

Author(s):

HANS STRENGE

Keyword(s):

Random Number ◽

Random Number Generation ◽

Foreign Languages ◽

Number Generation

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On-chip tunable SOI interferometer for quantum random number generation based on phase diffusion in lasers

Optics Communications ◽

10.1016/j.optcom.2020.126736 ◽

2021 ◽

Vol 485 ◽

pp. 126736

Author(s):

Muhammad Imran ◽

Vito Sorianello ◽

Francesco Fresi ◽

Bushra Jalil ◽

Marco Romagnoli ◽

...

Keyword(s):

Random Number ◽

Random Number Generation ◽

Phase Diffusion ◽

Number Generation ◽

On Chip

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True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA

Applied Sciences ◽

10.3390/app11083330 ◽

2021 ◽

Vol 11 (8) ◽

pp. 3330

Author(s):

Pietro Nannipieri ◽

Stefano Di Matteo ◽

Luca Baldanzi ◽

Luca Crocetti ◽

Jacopo Belli ◽

...

Keyword(s):

Field Programmable Gate Array ◽

Random Number ◽

Random Number Generator ◽

Random Number Generation ◽

Galois Ring ◽

Number Generator ◽

True Random Number Generator ◽

Number Generation ◽

Field Programmable ◽

Gate Array

Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995.

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