scholarly journals Multi-Attribute Tradespace Exploration as Front End for Effective Space System Design

2004 ◽  
Vol 41 (1) ◽  
pp. 20-28 ◽  
Author(s):  
Adam M. Ross ◽  
Daniel E. Hastings ◽  
Joyce M. Warmkessel ◽  
Nathan P. Diller
Keyword(s):  
System Design ◽  
Space System ◽  
Front End ◽  
Tradespace Exploration

scholarly journals Design of Power Efficient 32-Bit Processing Unit

2018 ◽  
Vol 7 (2.16) ◽  
pp. 52
Author(s):  
Dharmavaram Asha Devi ◽  
Chintala Sandeep ◽  
Sai Sugun L
Keyword(s):  
Low Power ◽  
System Design ◽  
Power Analysis ◽  
Low Power Design ◽  
Design Flow ◽  
Processing Unit ◽  
Verilog Hdl ◽  
Power Efficient ◽  
Front End ◽  
Verification Process

The proposed paper is discussed about the design, verification and analysis of a 32-bit Processing Unit.  The complete front-end design flow is processed using Xilinx Vivado System Design Suite software tools and target verification is done by using Artix 7 FPGA. Virtual I/O concept is used for the verification process. It will perform 32 different operations including parity generation and code conversions: Binary to Grey and Grey to Binary. It is a low power design implemented with Verilog HDL and power analysis is implementedwith clock frequencies ranging from 10MhZ to 100GhZ. With all these frequencies, power analysis is verified for different I/O standards LVCMOS12, LVCMOS25 and LVCMOS33.  

AN INTEGRATED SPACE SYSTEM DESIGN TOOL KIT FOR THE ITA SPACE CENTER’S PROJECTS

2021 ◽  
Author(s):  
Ana Luiza de Souza Maran ◽  
Gustavo Corrêa Fazio ◽  
Victor Moreno Coelho ◽  
Débora Miyuki Shinzato ◽  
Erica Generoso Lima ◽  
...  
Keyword(s):  
System Design ◽  
Design Tool ◽  
Space System

scholarly journals Seeking an alternative to tape-based custodial storage

2020 ◽  
Vol 245 ◽  
pp. 04001
Author(s):  
Sang Un Ahn ◽  
Latchezar Betev ◽  
Eric Bonfillou ◽  
Heejune Han ◽  
Jeongheon Kim ◽  
...  
Keyword(s):  
System Design ◽  
Error Rate ◽  
Data Protection ◽  
System Reliability ◽  
Data Security ◽  
Storage Management ◽  
Erasure Coding ◽  
Front End ◽  
Tier 1 ◽  
End Node

In November 2018, the KISTI Tier-1 centre started a project to design, develop and deploy a disk-based custodial storage with error rate and reliability compatible with a tape-based storage. This project has been conducted in collaboration with KISTI and CERN; especially the initial design was laid out from the intensive discussion with CERN IT and ALICE. The system design of the disk-based custodial storage consisted of high density JBOD enclosures and erasure coding data protection, implemented in EOS, the open-source storage management developed at CERN. In order to balance the system reliability, data security and I/O performance, we investigated the possible SAS connections of JBOD enclosures to the front-end node managed by EOS and the technology constraints of interconnections in terms of throughput to accommodate large number of disks foreseen in the storage. This project will be completed and enter production before the start of LHC Run3 in 2021. In this paper we present the detailed description on the initial system design, the brief results of test equipment for the procurement, the deployment of the system, and the further plans for the project.

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