Design and Implementation of Efficient Cryptographic Arithmetic based on Reversible logic and Vedic Mathematics

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) ◽

Design and Implementation of Efficient RGB to Gray scale Converter Architectures Using Reversible Logic

10.1109/discover50404.2020.9278066 ◽

2020 ◽

Author(s):

Swathi. U ◽

Smitha. U

Keyword(s):

Reversible Logic ◽

Gray Scale ◽

Design and implementation of H/W efficient Multiplier: Reversible logic gate approach

2015 International Conference on Communications and Signal Processing (ICCSP) ◽

10.1109/iccsp.2015.7322800 ◽

2015 ◽

Cited By ~ 3

Author(s):

K. Babulu ◽

M. Kamaraju ◽

P. Bujjibabu ◽

K. Pradeep

Keyword(s):

Logic Gate ◽

Reversible Logic ◽

2018 International Conference on Current Trends towards Converging Technologies (ICCTCT) ◽

Design and Implementation of 8 Bit Shift Register using Reversible Logic

10.1109/icctct.2018.8551165 ◽

2018 ◽

Author(s):

M. Rajeshwari ◽

Rohini. S. Hongal ◽

Rajashekar. B. Shettar

Keyword(s):

Reversible Logic ◽

Shift Register ◽

Smart Intelligent Computing and Applications - Smart Innovation, Systems and Technologies ◽

Design and Implementation of Reversible Logic Based Ternary Content Addressable Memory

10.1007/978-981-32-9690-9_42 ◽

2019 ◽

pp. 405-413

Author(s):

C. Santhi ◽

Moparthy Gurunadha Babu

Keyword(s):

Reversible Logic ◽

Content Addressable Memory ◽

Ternary Content Addressable Memory

Proceedings of the 9th International Conference on Computer and Automation Engineering - ICCAE '17 ◽

Design and Implementation of an Improved GEP Algorithm for Synthesis of Reversible Logic Circuits

10.1145/3057039.3057060 ◽

2017 ◽

Author(s):

Shuguang Zhao ◽

Chaozheng Wang ◽

Kaixiang Xia

Keyword(s):

Logic Circuits ◽

Reversible Logic ◽

Design and Implementation of High-Speed Low Power Multipliers Using Reversible Logic

INTERNATIONAL JOURNAL OF EMERGING TRENDS IN SCIENCE AND TECHNOLOGY ◽

10.18535/ijetst/v3i05.05 ◽

2016 ◽

Author(s):

Koustuv Chakraborty ◽

Keyword(s):

Low Power ◽

High Speed ◽

Reversible Logic ◽

2017 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) ◽

Design and implementation of high efficiency square root circuit using Vedic mathematics

10.1109/rteict.2017.8256778 ◽

2017 ◽

Author(s):

Y Chandu ◽

Maradi Megha

Keyword(s):

High Efficiency ◽

Square Root ◽

Vedic Mathematics ◽

Design and Implementation of Vedic Algorithm using Reversible Logic Gates

International Journal Of Engineering And Computer Science ◽

10.18535/ijecs/v4i8.20 ◽

2015 ◽

Author(s):

Hemangi P. Patil ◽

Keyword(s):

Logic Gates ◽

Reversible Logic ◽

Reversible Logic Gates

Design and Implementation of Vedic Multipliers Using Reversible Logic Gates

Journal of Electrical & Electronic Systems ◽

10.4172/2332-0796.1000255 ◽

2018 ◽

Vol 07 (02) ◽

Author(s):

Ravi JN ◽

Vijay Prakash AM ◽

Madan S

Keyword(s):

Logic Gates ◽

Reversible Logic ◽

Reversible Logic Gates

Design and implementation of high performance and area efficient square architecture using Vedic Mathematics

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-019-01496-w ◽

2019 ◽

Vol 102 (3) ◽

pp. 501-506 ◽

Cited By ~ 1

Author(s):

Beechu Naresh Kumar Reddy

Keyword(s):

High Performance ◽

Vedic Mathematics ◽

Area Efficient