High speed VLSI Squaring unit of Binary Numbers Design with Yavadunam Sutra and Bit Reduction
2019 ◽
Vol 9
(2)
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pp. 775-778
Keyword(s):
Vedic Mathematics is an ancient Indian algebra in which 16 sutras are used to measure. For excellent performance, most high-speed applications such as cryptography and digital signal processing need powerful and high-speed multipliers. Squaring is a specific case of multiplication. A specialized squaring device can greatly boost the measurement period and significantly reduce the delay. This study discusses the concept of a new square architecture utilizing Vedic-mathematics sutra "Yavadunam." The proposed method uses the amount deficit from the closest base to calculate every operand's circle. The square of a larger number of magnitude is reduced by this method to a smaller multiplication of magnitude and an addition operation
Keyword(s):
2015 ◽
Vol 719-720
◽
pp. 534-537
2010 ◽
Vol 18
(8)
◽
pp. 1225-1229
◽
Keyword(s):