scholarly journals Modified SHE for Grid Connection.pdf

2019 ◽  
Author(s):  
Subhendu Bikash Santra
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Mixed Model ◽  
Theoretical Concept ◽  
Multiple Solution ◽  
Voltage Source ◽  
Numerical Techniques ◽  
Pwm Inverter ◽  
Pulse Width Modulated ◽  
Laboratory Prototype

<div>This paper presents an improved selective harmonics elimination technique for PV assisted single phase</div><div>grid-tied pulse width modulated (PWM) voltage source</div><div>inverter (VSI). The switching angles are determined offline</div><div>through numerical techniques and stored in microcontroller</div><div>memory as a function of modulation index md for online</div><div>application. For multiple solution, the solution which leads to</div><div>lower change of switching angles (α) from the previous md, is considered for storing in the processor memory. This leads to less no. of sections for the processor when a piecewise mixed model is considered for storing the entire switching angle curve. This technique is well suited for limiting voltage THD in two level grid connected VSI with L-C filter. The verification of theoretical concept is done in laboratory prototype of PV (500 W) connected to grid-tied PWM inverter. The control environment is realized in embedded FPGA interfaced national instrument hardware.</div>

scholarly journals Modified SHE for Grid Connection.pdf

2019 ◽  
Author(s):  
Subhendu Bikash Santra
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Mixed Model ◽  
Theoretical Concept ◽  
Multiple Solution ◽  
Voltage Source ◽  
Numerical Techniques ◽  
Pwm Inverter ◽  
Pulse Width Modulated ◽  
Laboratory Prototype

<div>This paper presents an improved selective harmonics elimination technique for PV assisted single phase</div><div>grid-tied pulse width modulated (PWM) voltage source</div><div>inverter (VSI). The switching angles are determined offline</div><div>through numerical techniques and stored in microcontroller</div><div>memory as a function of modulation index md for online</div><div>application. For multiple solution, the solution which leads to</div><div>lower change of switching angles (α) from the previous md, is considered for storing in the processor memory. This leads to less no. of sections for the processor when a piecewise mixed model is considered for storing the entire switching angle curve. This technique is well suited for limiting voltage THD in two level grid connected VSI with L-C filter. The verification of theoretical concept is done in laboratory prototype of PV (500 W) connected to grid-tied PWM inverter. The control environment is realized in embedded FPGA interfaced national instrument hardware.</div>

An improved selective harmonics elimination technique for PV assisted single phase grid-tied PWM inverter

2020 ◽  
Vol 39 (2) ◽  
pp. 379-394
Author(s):  
Subhendu Bikash Santra ◽  
Subodh Kumar Mohanty
Keyword(s):  
Single Phase ◽  
Mixed Model ◽  
Modulation Index ◽  
Voltage Source ◽  
Content Type ◽  
Pwm Inverter ◽  
Pulse Width Modulated ◽  
Filter Size ◽  
Model Technique ◽  
Laboratory Prototype

Purpose The purpose of this study is to present a new methodology of selective harmonics elimination (SHE) technique suitable for single-phase photovoltaic (PV) tied pulse width modulated (PWM) inverter. Design/methodology/approach In the proposed SHE, switching angles for inverter control are determined offline through numerical techniques and stored in a microcontroller memory as a function of modulation index (md). The methodology uses the solution that leads to a lower change of switching angles from the previous modulation index (md) for storing in the processor memory for multiple solutions. This leads to a smaller number of sections when a piecewise mixed model is considered for storing the entire switching angle curve for the online inverter control. The proposed idea is simulated and experimentally validated on a laboratory prototype of PV (500 W) grid-tied PWM inverter. The control environment is then realized in NI c-RIO 9082. Findings This proposed technique is suitable for limiting voltage total harmonics distortion (THD) in single-phase PV tied grid connected voltage source inverter (VSI). Moreover, it is found that filter (L-C) size requirement is less. Originality/value The proposed SHE with piecewise mixed model technique effectively reduces voltage THD with less filter size (L-C) in a single-phase PV-tied system.

scholarly journals Single-Phase Inverter Deadbeat Control with One-Carrier-Period Lag

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 154
Author(s):  
Wei Yao ◽  
Jiamin Cui ◽  
Wenxi Yao
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Voltage Source ◽  
Current Loop ◽  
Deadbeat Control ◽  
Additional Advantage ◽  
Power Sources ◽  
Pwm Inverter ◽  
Single Phase Inverter

This paper presents a novel digital control scheme for the regulation of single-phase voltage source pulse width modulation (PWM) inverters used in AC power sources. The proposed scheme adopts two deadbeat controllers to regulate the inner current loop and the outer voltage loop of the PWM inverter. For the overhead of digital processing, the change of duty of PWM lags one carrier period behind the sampling signal, which is modeled as a first-order lag unit in a discrete domain. Based on this precise modeling, the deadbeat controllers make the inverter get a fast dynamic response, so that the inverter’s output voltage is obtained with a very low total harmonic distortion (THD), even when the load is fluctuating. The parameter sensitivity of the deadbeat control was analyzed, which shows that the proposed deadbeat control system can operate stably when the LC filter’s parameters vary within the range allowed. The experimental results of a 2kW inverter prototype show that the THD of the output voltage is less than 3% under resistive and rectifier loads, which verifies the feasibility of the proposed scheme. An additional advantage of the proposed scheme is that the parameter design of the controller can be fully programmed without the experience of a designer.

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