scholarly journals Single-Phase Inverter Deadbeat Control with One-Carrier-Period Lag

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 154
Author(s):  
Wei Yao ◽  
Jiamin Cui ◽  
Wenxi Yao

This paper presents a novel digital control scheme for the regulation of single-phase voltage source pulse width modulation (PWM) inverters used in AC power sources. The proposed scheme adopts two deadbeat controllers to regulate the inner current loop and the outer voltage loop of the PWM inverter. For the overhead of digital processing, the change of duty of PWM lags one carrier period behind the sampling signal, which is modeled as a first-order lag unit in a discrete domain. Based on this precise modeling, the deadbeat controllers make the inverter get a fast dynamic response, so that the inverter’s output voltage is obtained with a very low total harmonic distortion (THD), even when the load is fluctuating. The parameter sensitivity of the deadbeat control was analyzed, which shows that the proposed deadbeat control system can operate stably when the LC filter’s parameters vary within the range allowed. The experimental results of a 2kW inverter prototype show that the THD of the output voltage is less than 3% under resistive and rectifier loads, which verifies the feasibility of the proposed scheme. An additional advantage of the proposed scheme is that the parameter design of the controller can be fully programmed without the experience of a designer.

2017 ◽  
Vol 26 (12) ◽  
pp. 1750203 ◽  
Author(s):  
Ebrahim Babaei ◽  
Mohammad Shadnam Zarbil ◽  
Mehran Sabahi

In this paper, a new topology for cascaded multilevel inverters based on quasi Z-source converter is proposed. In the proposed topology, the magnitude of output voltage is not limited to dc voltage source, while the magnitude of output voltage of conventional cascaded multilevel inverters is limited to dc voltage source. In the proposed topology, the magnitude of output voltage can be increased by controlling the duty cycle of shoot-through (ST) state, transformer turn ratio, and the number of switched inductors in the Z-source network. As a result, there is no need for extra dc–dc converter. In the proposed topology, the total harmonic distortion (THD) is decreased in comparison with the conventional Z-source inverters. The proposed topology directly delivers power from a power source to load. In addition, in the proposed basic unit, higher voltage gain is achieved in higher modulation index which is an advantage for the proposed base unit. The performance of the proposed topology is verified by the experimental results of five-level single-phase inverter.


Author(s):  
Laith A. Mohammed ◽  
Taha A. Husain ◽  
Ahmed M. T. Ibraheem

This paper presents design and practical implementation of single-phase inverter based on selective harmonic elimination-pulse width modulation (SHE-PWM) technique. Microcontroller mega type Arduino used as a controller for producing the gate pulses. The optimized switching angles determination results in wide range of output voltage. Depending on number of switching angles, the lower order harmonics (LOHs) can be eliminated to improve the output voltage waveform. A comparison study using MATLAB/Simulink for sinusoidal-PWM and SHE-PWM techniques, which shows for the same LOH in the output voltage waveform, the SHE-PWM has less number of pulses per half cycle than sinusoidal-PWM strategy. The reduction in number of pulses results less switching losses. The simulation done using ten switching angles to drive R-L load. A prototype of SHE-PWM inverter with R-L load is used to validate the simulation results.


The single phase inverter provides continuous AC power supplies without any interrupt .The idea is to serve sinusoidal AC output whose voltage and frequency can be controlled by PWM pulse. The main theme of this concept is to present a new construction of an FPGA based control techniques for inverter. In this proposed system, a PI controller is used to the single phase PWM voltage source inverter. It minimizes periodic distraction resulted from linear load. Simulation provides the results, with reduced harmonics distortion of the output voltage .and innovative technique for including a fuzzy logic controller through a usual sampled pulse-width modulator is reported. The FLC is used to decrease the harmonic distortion and to offer better standard regulation. Simulations are carried out in ALTERA-Quartus II 8.0 software in addition by means of Matlab/Simulink and the results are presented for various control techniques. FPGA controller is preferred for the real time realization of the switching approach, for the most part owing to its larger computation speed which is able to guarantee the precision of the PWM pulse is developed. At the concluding stage the FPGA is used as a PWM generator in order to apply the appropriate signals for inverter switches


2015 ◽  
Vol 37 ◽  
pp. 175 ◽  
Author(s):  
Ali Kalantar Zadeh ◽  
Leila Ilan Kashkooli ◽  
Seyed Alireza Mirzaee

In recent years, there has been a high demand for high-power inverters. Unlike a rectifier, an inverter with a high-power electronic oscillator is able to convert direct current (DC) into alternating current (AC) in different forms. Regarding this point, the current paper presents an analysis and design of fuzzy logic control (FLC) applied to an inverter of a single-phase voltage source using LC filter and voltage sensor. Also, three modes of inverter voltage non-linear control (back-stepping, sliding and fuzzy modes) have been simulated and compared. The results of simulation indicated that the suggested FLC could attenuate and reduce total harmonic distortion (THD) under linear loading conditions.


2018 ◽  
Vol 7 (2.24) ◽  
pp. 55
Author(s):  
Anuja Prashant Diwan ◽  
N Booma Nagarajan ◽  
T Murugan ◽  
S Ashrafudeen ◽  
G J. Jenito Paul

In this paper, single phase nine level cascaded multilevel inverter using trinary voltage source is described. Normally for getting nine level MLI output, four H-Bridges are required. But in proposed method, nine level output is achieved by using two H-Bridges only. Performance of Multilevel inverter is improved by using modular switching pattern. This method reduces the number of switches to the half and thus reduces switching losses. Since the number of levels at the output voltage is increased, Total Harmonic Distortion (THD) gets reduced significantly. This presents simple configuration is simple and can be controlled easily. MATLAB-SIMULINK is used to validate the results of proposed technic, simulation is carried out using. The proposed method has been exhaustively compared with classical cascaded H-Bridge topology. 


2021 ◽  
Vol 10 (6) ◽  
pp. 2921-2928
Author(s):  
Adil Hasan Mahmood ◽  
Mustafa F. Mohammed ◽  
Mohammed Omar ◽  
Ali H. Ahmad

In power electronics, it is necessary to select the best converter circuit topology that has good performance among different converters. The single-ended primary inductor converter (SEPIC) has good performance and is advantageous among different direct current/direct current (DC/DC) converters. In this paper, a design of a SEPIC converter is made by selecting the values of its components according to the required output voltage and power. The design is made by an assumption that both of its inductors have the same value. The converter is tested by using MATLAB Simulink successfully. Later, its output voltage is regulated by using a proportional integral (PI-controller) through tuning its proportional and integral gains. Finally, the SEPIC converter is connected to a single-phase full-bridge inverter to supply its required DC voltage. The role of the SEPIC converter is to regulate the dc-link voltage between its output side and the inverter. The results showed the success of this connection to supply alternating current (AC) loads with low total harmonic distortion (THD).


2020 ◽  
Vol 39 (2) ◽  
pp. 589-599
Author(s):  
D.B.N. Nnadi ◽  
S.E. Oti ◽  
C.I. Odeh

Splitting of a dc voltage source with two capacitors has been the approach in generating 5-level output voltage with single- and three-phase full-bridge circuits and added bidirectional switch. Associated with this configuration is the problem of voltage imbalance between the splitting capacitors. In addition, the inverter output voltage magnitude is obviously limited to the value of the split input voltage source. Presented in this paper is a unit topology for single-phase 5-level multilevel inverter, MLI. It simply consists of a full-bridge circuit, a capacitor, charge-discharge unit and a dc source. The charge-discharge unit with the capacitor is the interface between the full-bridge and the dc source. The proposed unit cell can generate a 5-level output voltage waveform whose peak value is twice the input voltage value. For higher output voltage level, a cascaded structure of the developed unit cell is presented. Comparing the proposed inverter with CHB inverter and some recent developed MLI topologies, it is found that the proposed inverter configuration generates higher output voltage value, at reduced component-count, than other topologies, for a specified number of dc input voltages. For two cascaded modules, simulation and experimental verifications are carried out on the proposed inverter topology for an R-L load. Keywords: Cascaded multilevel, Inverter, total harmonic distortion, topologies, waveform


VLSI Design ◽  
2010 ◽  
Vol 2010 ◽  
pp. 1-14 ◽  
Author(s):  
K. Selvajyothi ◽  
P. A. Janakiraman

This paper presents a single chip FPGA (Altera Cyclone II) controlled single phase inverter, programmed for the reduction of harmonics in the output voltage. Separate composite digital observers have been designed for extracting the fundamental and harmonic components of the voltage and the highly distorted current signals, particularly when the inverter supplies nonlinear loads. These observers have been embedded into the FPGA along with the controllers and I/O interfaces. The multiple observers yield very pure in-phase and quadrature voltage signals for use in the outer loop and similar signals for stabilizing the inner current loop. The Inverter could be modeled as a feed back control system with the fundamental component of the voltage as the desired output while the voltage harmonics take the role of noise creeping into the output. To obtain a very low total harmonic distortion in the voltage waveform, the well-known control strategy of using a very large feed back around the noise signal has been employed.


2021 ◽  
Vol 2 (2) ◽  
pp. 44-53
Author(s):  
GENNADY S. MYTSYK ◽  
◽  
ZAW HTET HEIN ◽  

The recent interest of developers of new technology in studying a structural and algorithmic synthesis (SAS) of voltage source inverters (VSI) for solar power plants (SPP) is stemming from a growing need to solve problems in connection with the revealed new possibilities of converting energy flow (from DC to AC) with better energy efficiency by reducing the depth of its pulse modulation. This problem is solved by using more rational structural and algorithmic solutions. It is shown that for SPPs for a capacity of about 1 MW and more, it is more expedient to construct inverters based on the energy flow multichannel conversion principle. Given a limited power capacity of the transistor components, the application of this principle allows the problem to be solved in fact without using an output filter. The output voltage waveform is shaped using the energy flow pulse-amplitude modulation (PAM), and its M parts are summed in the output circuit by out using M winding transfilters (M-TF). The proposed method for carrying out combined SAS of single-phase voltage source inverters with multichannel conversion is considered, which consists in using an N-level single-phase VSI (N-SPVSI) in each of the M channels with the voltage levels optimized in terms of the minimum total harmonic distortion (THD). The resulting voltage of this class of single-phase inverters, designated as MxN-SPVSI, is formed by the corresponding phase shift of the channel voltages followed by summing the channel currents by M-TF. It is shown that the resulting output voltage levels are also close to their values optimized with respect to the minimum of the THD indicator. The results from a comparative analysis of two options — a single-channel 8-level inverter and a four-channel 8-level inverter are given. For the second option, only one intermediate voltage tap in the solar battery is required (instead of seven taps in the first option) along with modern transistor components that are available for practical implementation. In both options, the THD value less than 5% is obtained with almost no need of using an output filter. The presented results provide a certain information and methodological support for system designing of single-phase voltage source inverters as applied to the specific features of solar power plants. Three-phase inverters can be built on the basis of three single-phase inverters with galvanic isolation of the power sources for each phase.


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