An All CMOS Current Reference

2011 ◽  
Vol 135-136 ◽  
pp. 192-197
Author(s):  
Lin An Li ◽  
Ming Tang ◽  
Wen Ou ◽  
Yang Hong

In this paper, an all CMOS current reference circuit which generates a reference current independent of PVT (Process, supply Voltage, and Temperature) variations is presented. The circuit consists of a self-biased current source (SBCS) and two nested connected transistors which supply a voltage with positive temperature coefficient and the resulting reference circuit has low temperature coefficient. It is based on CSMC 0.5um mixed-signal process with the supply voltage of 5V. The precision of reference current is about ±3.05% when considering the process, supply voltage and temperature variation at the same time.

a low voltage CMOS Nano power current reference circuit has been presented in this paper and also the circuit simulation performance in 180-nm UMC CMOS technology. Most of the MOSFETs operate in sub-threshold region consisting of bias-voltage, start-up and current-source sub-circuits. A stable reference current of 4-nA lying in supply voltage range of 1 V-1.8 V has been generated with line sensitivity of 0.203% /V. Within the temperature range of 0°C to 100 °C, and the voltage level of 1.8 V, the temperature coefficient was 7592ppm/°C. At the same voltage supply, the power dissipation was found out to be 380 NW. It is suitable to use this circuit in sub threshold power aware large scale integration.


2017 ◽  
Vol 2 (1) ◽  
pp. 1-4
Author(s):  
Dinesh Kushwaha ◽  
D. K. Mishra

This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180- nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, current-source sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supply voltage range 1 V- 1.8 V with line sensitivity of 0.203%/V.The temperature coefficient of the current was 7592ppm/°C at 1.8 V in the range of 0°C-100°C. The power dissipation was 380 NW at 1.8 V Supply. The proposed circuit would be suitable for use in sub-threshold –operated power-aware large-scale integration


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