Study on an Improved Median Filtering Algorithm

2014 ◽  
Vol 989-994 ◽  
pp. 2273-2277
Author(s):  
Heng Zhang ◽  
Min Gao ◽  
Hai Long Ren

Median filter is a very effective method of non-linear smoothing filtering. However, the data ordering for traditional median filtering (TMF) is very time-consuming and hardly satisfy real-time image processing. This article proposes a kind of fast median filtering algorithm based on grey histogram, the filter seeks the median through the grey histogram of mask window, not the numeric sort, which decreases the comparison times. Moreover, the update of histogram by using the overlap of mask window increases the arithmetic processing speed. Meanwhile, in the proposed algorithm, the two-level self-adapting threshold comparison, with a higher precision of detection, is used to implement the inspection of noise point and improve the image quality and increase the signal-noise ratio by processing the noise point and non-noise point respectively. The experiments by matlab simulation can prove the availability of this algorithm.

2014 ◽  
Vol 513-517 ◽  
pp. 1055-1058
Author(s):  
Jin Lun Li ◽  
Shao Hui Cui ◽  
Ku Nao Guo

Real-time image processing has been a difficult problem in embedded image processing system. The traditional MCU could not meet the real-time demand when large volume of data awaited to be proceed. FPGA is an effective driver to achieve real-time parallel processing of data. The implementation rationale and the design of module have been given in this article; and the Hard Software has been truly achieved. At the end of the article, the simulation waveform graph has been obtained by processing functional simulation on algorithm module by using Modelsim software; and the simulation result shows that this design is able to proper functioning and has good application prospects.


2012 ◽  
Vol 482-484 ◽  
pp. 200-205
Author(s):  
Jin Tong Li ◽  
Xiao Jie Duan

The high speed of image processing is required in the real-time image processing system. To improve the image processing speed, it is mainly implemented by hardware. This thesis constructs an image preprocessing system based on FPGA. Several typical image preprocessing algorithms, such as fast median filter, mean filter, Gaussian filter, Laplacian and Sobel operator edge filters, are implemented in the system. In the process of the system design, the characteristics and requirements of the image-processing implemented by hardware are fully considered. The parallel attribute insiding the image algorithm is effectively dug and the pipeline structure is adopt. All mentioned above are useful to optimize and improve the algorithms, reduce the hardware consumption and raise speed of image processing.


2011 ◽  
Vol 230-232 ◽  
pp. 1054-1057
Author(s):  
Dao De Zhang ◽  
Yu Rong Pan ◽  
Xin Yu Hu ◽  
Guang You Yang ◽  
Cheng Xu

Based on FPGA’S Balance and exchange principle of area and speed, Using the FPGA internal rich logic resources and powerful hardware characteristics , the traditional median filtering algorithm is reduced to 2 clock cycle , Greatly improving the image processing speed . And by using threshold, in a certain extent, reducing the image fuzzy phenomena brought by the median filter . The results of test show that the system runs stability, the time of achieving the median filtering algorithm are narrowed to the shortest clock cycle.


Author(s):  
Khaldoon M. Mhaidat ◽  
Mohammad I. Alali ◽  
Inad A. Aljarrah

This paper presents efficient low-power compact hardware designs for common image processing functions including the median filter, smoothing filter, motion blurring, emboss filter, sharpening, Sobel, Roberts, and Canny edge detection. The designs were described in Verilog HDL. Xilinx ISE design suite was used for code simulation, synthesis, implementation, and chip programming. The designs were all evaluated in terms of speed, area (number of LUTs and registers), and power consumption. Post placement and routing (Post-PAR) results show that they need very small area and consume very little power while achieving good frame per second rate even for HDTV high resolution frames. This makes them suitable for real-time applications with stringent area and power budgets.


2013 ◽  
Vol 437 ◽  
pp. 849-852 ◽  
Author(s):  
Yu Lan Wei ◽  
Bing Li ◽  
Jian Dong Li ◽  
Ying Ying Fan

In order to filter the impulse noise existing in the weld surface defect images, the traditional median filtering will dim image, even destroy some details in the image, We put forward a new filtering algorithm based on dual threshold Criterion. This way distinguishes the noise point and signal location in the first, and it only doing median filter to the noise point. Lastly, it solves the image’s boundary. We can find it when compared to the traditional median filtering and modified extremum median filtering, the way in this article can be good for filtration, and can keep the image’s details, which have obvious advantage.


2012 ◽  
Vol 6-7 ◽  
pp. 659-664
Author(s):  
En Shun Kang ◽  
Yu Xi Zhao

Traditional median filter algorithm has the long processing time, which goes against the real-time image processing. According to its shortcomings, this paper puts forward the rapid median filter algorithm, and uses DE2 board of the company called Altera to do the realization on FPGA (CycloneII 2C35). The experimental results show that the image pre-processing system is able to complete a variety of high-level image algorithms in milliseconds, and FPGA's parallel processing capability and pipeline operations can dramatically improve the speed of image processing, so the FPGA-based image processing system has broad prospects for development.


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