scholarly journals P-Type SiC Layers Formed by VLS Induced Selective Epitaxial Growth

2005 ◽  
Vol 483-485 ◽  
pp. 633-636 ◽  
Author(s):  
Mihai Lazar ◽  
Christophe Jacquier ◽  
Christiane Dubois ◽  
Christophe Raynaud ◽  
Gabriel Ferro ◽  
...  
Keyword(s):  
Epitaxial Growth ◽  
Sheet Resistance ◽  
Doping Concentration ◽  
Reactive Ion Etching ◽  
Ion Etching ◽  
Substrate Interface ◽  
Selective Epitaxial Growth ◽  
High Doping Concentration ◽  
P Type

Al-Si patterns were formed on n-type 4H-SiC substrate by a photolithographic process including wet Al etching and Si/SiC reactive ion etching (RIE) process. RF 1000°C annealing under C3H8 flow was performed to obtain p+ SiC layers by a Vapour-Liquid-Solid (VLS) process. This method enables to grow layers with different width (up to 800 µm) and various shapes. Nevertheless the remaining Al-based droplets on the largest patterns are indicators of crack defects, going through the p+ layer down to the substrate. SIMS analyses have shown an Al profile with high doping concentration near the surface, high N compensation and Si/C stoechiometry variation between the substrate and the VLS layer. The hydrogen profile follows the Al profile in the VLS layer with an overshoot at the VLS/substrate interface. I-V measurements performed directly on the semiconductor layers have confirmed the formed p-n junction and allowed to measure a sheet resistance of 5.5 kW/ı

Characterization of Hg0.7Cd0.3Te n- on p-type structures obtained by reactive ion etching induced p- to n conversion

2000 ◽  
Vol 29 (6) ◽  
pp. 837-840 ◽  
Author(s):  
J. Antoszewski ◽  
C. A. Musca ◽  
J. M. Dell ◽  
L. Faraone
Keyword(s):  
Reactive Ion Etching ◽  
Ion Etching ◽  
P Type

Reactive-Ion-Etching Induced Deep Levels Observed in n-Type and p-Type 4H-SiC

2010 ◽  
Vol 645-648 ◽  
pp. 759-762
Author(s):  
Koutarou Kawahara ◽  
Giovanni Alfieri ◽  
Michael Krieger ◽  
Tsunenobu Kimoto
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Reactive Ion Etching ◽  
Deep Levels ◽  
Total Density ◽  
Ion Etching ◽  
Initial Concentration ◽  
Grown Sample ◽  
Transient Spectroscopy ◽  
P Type

In this study, deep levels are investigated, which are introduced by reactive ion etching (RIE) of n-type/p-type 4H-SiC. The capacitance of as-etched p-type SiC is remarkably small due to compensation or deactivation of acceptors. These acceptors can be recovered to the initial concentration of the as-grown sample after annealing at 1000oC. However, various kinds of defects remain at a total density of ~5× 1014 cm-3 in a surface-near region from 0.3 μm to 1.0 μm even after annealing at 1000oC. The following defects are detected by Deep Level Transient Spectroscopy (DLTS): IN2 (EC – 0.35 eV), EN (EC – 1.6 eV), IP1 (EV + 0.35 eV), IP2 (HS1: EV + 0.39 eV), IP4 (HK0: EV + 0.72 eV), IP5 (EV + 0.75 eV), IP7 (EV + 1.3 eV), and EP (EV + 1.4 eV). These defects generated by RIE can be significantly reduced by thermal oxidation and subsequent annealing at 1400oC.

Epitaxial growth of CdTe on (211) silicon mesas formed by deep reactive ion etching

2006 ◽  
Vol 35 (8) ◽  
pp. 1636-1640 ◽  
Author(s):  
Jay Molstad ◽  
Phil Boyd ◽  
Justin Markunas ◽  
David J. Smith ◽  
Ed Smith ◽  
...  
Keyword(s):  
Epitaxial Growth ◽  
Reactive Ion Etching ◽  
Ion Etching ◽  
Deep Reactive Ion Etching

scholarly journals P-Type SiC Layers Formed by VLS Induced Selective Epitaxial Growth

2005 ◽  
pp. 633-636
Author(s):  
Mihai Lazar ◽  
Christophe Jacquier ◽  
Christiane Dubois ◽  
Christophe Raynaud ◽  
Gabriel Ferro ◽  
...  
Keyword(s):  
Epitaxial Growth ◽  
Selective Epitaxial Growth ◽  
P Type

Mercury annealing of reactive ion etching induced p- to n-type conversion in extrinsically doped p-type HgCdTe

1998 ◽  
Vol 83 (10) ◽  
pp. 5555-5557 ◽  
Author(s):  
E. P. G. Smith ◽  
J. F. Siliquini ◽  
C. A. Musca ◽  
J. Antoszewski ◽  
J. M. Dell ◽  
...  
Keyword(s):  
Reactive Ion Etching ◽  
Type Conversion ◽  
Ion Etching ◽  
P Type

New Approaches to In Situ Doping of SiC Epitaxial Layers

2011 ◽  
Vol 324 ◽  
pp. 14-19
Author(s):  
Gabriel Ferro
Keyword(s):  
Epitaxial Growth ◽  
Epitaxial Film ◽  
Liquid Droplets ◽  
Selective Epitaxial Growth ◽  
Vls Growth ◽  
Record Value ◽  
P Type ◽  
Original Approach ◽  
Very High

In this paper, the issues related to in-situ doping of silicon carbide (SiC) semiconductor during epitaxial growth are reviewed. Some of these issues can find solution by using an original approach called vapour-liquid-solid (VLS) mechanism. In this technique, the SiC seed is covered by a Sibased melt and is fed by propane in order to growth the epitaxial film. Using Al-Si melts and temperatures as low as 1100°C, very high p type doping was demonstrated, with a record value of 1.1021 at.cm-3. It leads to very low contact resistivity and even to metallic behaviour of the SiC deposit even at low temperature. Using Ge-Si melts, non intentionally low doped n type layers are grown. By forming Si-containing liquid droplets on a SiC seed, one can extrapolate this VLS growth to selective epitaxial growth (SEG). Such approach was successfully applied for both Al and Ge-based systems in order to form p+ and n doped areas respectively.

MBE Grown Planar Doped Barrier Diodes

1999 ◽  
Vol 570 ◽  
Author(s):  
Vo Van Tuyen
Keyword(s):  
Epitaxial Growth ◽  
Potential Barrier ◽  
Doping Concentration ◽  
Layer Growth ◽  
Current Transport ◽  
Transport Mechanisms ◽  
Current Limitation ◽  
Background Doping ◽  
P Type ◽  
Growth Technology

The realization of Planar Doped Barrier Diode (PDBD) presented in this paper starts out from the limits of the MBE layer growth technology. The limitations due to the background doping concentration and the diffusion of the n and p type dopants during the epitaxial growth are considered. The next parameter is the height of the potential barrier. The choice of this value depends on the requirements of the application. It must take into consideration the current transport mechanisms and the current limitation appearing at higher bias levels.

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