scholarly journals Very Long Instruction Word: A Higher Performance Processor

2020 ◽  
Vol 175 (15) ◽  
pp. 11-15
Author(s):  
Adedoyin Odumabo ◽  
Ademola Adedokun ◽  
Akinlolu Adekotujo ◽  
Oluwatosin Ogunbodede
2011 ◽  
Vol 130-134 ◽  
pp. 2907-2910
Author(s):  
Hong Yan Li

The important method of studying cipher coprocessor is focus on system architecture of processor in combination with reconfigurable design technique. How to improve performance of cipher coprocessor is important. Based on very long instruction word (VLIW) structure and reconfigurable design technique, specific instruction cipher coprocessor is designed. In this paper, the cipher coprocessor instruction level parallelism compilation technique is studied to enhance the cipher coprocessor performance by increasing the instruction level parallelism.


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