scholarly journals BB-Gen: A Packet Crafter for Data Plane Evaluation

Author(s):  
Fabricio Cesen ◽  
P. Gyanesh Patra ◽  
Christian Rothenberg

With the advent of research on fast path packet processing, traffic generator tools witnessed many entrants with features ranging from supporting list of protocols, analyzing network traffic to measuring throughput and latency of packets. While approaching towards feature completeness, the tools are becoming more complex every time making it difficult to port, manage, and use. BBGen with a sole focus on simplicity complements other traffic generators instead of trying to replace them. BB-Gen is a simple CLI-based packet crafter to generate packet flows formatted as PCAP files. The tool supports different standard protocols and creates the necessary traces for network function configuration and testing. It allows creating PCAPs for worst and best case scenarios with all unique flows or following flow distributions published elsewhere. In this demo, we feature BB-Gen as used by the MACSAD development team to test P4-based software switch pipelines.

2021 ◽  
Author(s):  
Hanyu Zhao ◽  
Qing Li ◽  
Jingpu Duan ◽  
Yong Jiang ◽  
Kai Liu
Keyword(s):  

2020 ◽  
Vol 38 (6) ◽  
pp. 1075-1088 ◽  
Author(s):  
Shihabur Rahman Chowdhury ◽  
Anthony ◽  
Haibo Bian ◽  
Tim Bai ◽  
Raouf Boutaba

2005 ◽  
Author(s):  
S. Mahadevan ◽  
F. Angiolini ◽  
M. Storgaard ◽  
R.G. Olsen ◽  
J. Sparso ◽  
...  

2018 ◽  
Vol 2018 ◽  
pp. 1-11 ◽  
Author(s):  
Qianqiao Chen ◽  
Vaibhawa Mishra ◽  
Jose Nunez-Yanez ◽  
Georgios Zervas

The software defined network and network function virtualization are proposed to address the network ossification issue in current Internet infrastructure. Network functions and services are implemented as software applications to increase the programmability of network. However, involving general purpose processors in data plane restricts the bandwidth of network services. Therefore, to keep both the bandwidth and flexibility, a FPGA platform is suggested as a reconfigurable platform to deliver high bandwidth virtual network functions on data plane. In this paper, the FPGA resource has been virtualized by interconnecting partial reconfigurable regions to deliver high bandwidth reconfigurable processing on network streams. With the help of partial reconfiguration technology, network functions on our platform can be configured without affecting other functions on the same FPGA device. The on-chip interconnect system is further evaluated by comparing with existing network-on-chip system. A reconfiguration process is also proposed and demonstrated that it can be performed on our platform. The process can happen in the real time of network services and it is able to keep the original function working during the download of partial bitstream.


Author(s):  
Yaroslav Konstantinovich Kuzmin ◽  
Dmitry Yuryevitch Volkanov ◽  
Julia Alexandrovna Skobtsova

This work presents a network processing unit based on specialized computational cores that is used for packet processing in network devices (e.g. in network switches). Nowadays stateful data-plane algorithms are developing in software-defined networks. The idea of stateful data-plane algorithms is to move a part of control information from control plane to data plane. But these algorithms require hardware support because they need resources for state handling. This work presents the network processing unit architecture modifications that allow to use stateful data-plane algorithms that require state synchronization between the NPU processing pipelines.


2019 ◽  
Vol 149 ◽  
pp. 187-199 ◽  
Author(s):  
Leonardo Linguaglossa ◽  
Dario Rossi ◽  
Salvatore Pontarelli ◽  
Dave Barach ◽  
Damjan Marjon ◽  
...  

2021 ◽  
pp. 1-10
Author(s):  
Iman Lotfimahyari ◽  
German Sviridov ◽  
Paolo Giaccone ◽  
Andrea Bianco

Electronics ◽  
2021 ◽  
Vol 10 (13) ◽  
pp. 1543
Author(s):  
Pilar Manzanares-Lopez ◽  
Juan Pedro Muñoz-Gea ◽  
Josemaria Malgosa-Sanahuja

Software-defined networking (SDN) architecture has provided well-known advantages in terms of network programmability, initially offering a standard, open, and vendor-agnostic interface (e.g., OpenFlow) to instruct the forwarding behavior of network devices from different vendors. However, in the last few years, data plane programmability has emerged as a promising approach to extend the network management allowing the definition and programming of customized and non-standardized protocols, as well as specific packet processing pipelines. In this paper, we propose an in-network key-based routing protocol called P4-KBR, in which end-points (hosts, contents or services) are identified by virtual identifiers (keys) instead of IP addresses, and where P4 network elements are programmed to be able to route the packets adequately. The proposal was implemented and evaluated using bmv2 P4 switches, verifying how data plane programmability offers a powerful tool to overcome continuing challenges that appear in SDN networks.


2020 ◽  
Vol 45 (3) ◽  
pp. 217-232
Author(s):  
Daniel Szostak ◽  
Krzysztof Walkowiak

AbstractKnowledge about future optical network traffic can be beneficial for network operators in terms of decreasing an operational cost due to efficient resource management. Machine Learning (ML) algorithms can be employed for forecasting traffic with high accuracy. In this paper we describe a methodology for predicting traffic in a dynamic optical network with service function chains (SFC). We assume that SFC is based on the Network Function Virtualization (NFV) paradigm. Moreover, other type of traffic, i.e. regular traffic, can also occur in the network. As a proof of effectiveness of our methodology we present and discuss numerical results of experiments run on three benchmark networks. We examine six ML classifiers. Our research shows that it is possible to predict a future traffic in an optical network, where SFC can be distinguished. However, there is no one universal classifier that can be used for each network. Choice of an ML algorithm should be done based on a network traffic characteristics analysis.


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