Noise Analysis of a Serial Multiple Sampling in Back-Illuminated CMOS Image Sensor

2016 ◽  
Author(s):  
H. Wakabayashi ◽  
K. Yamaguchi ◽  
Y. Yamagata
Keyword(s):  
Noise Analysis ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Multiple Sampling ◽  
Back Illuminated

A 1/4-inch 3.9Mpixel low-power event-driven back-illuminated stacked CMOS image sensor

2018 ◽  
Author(s):  
Oichi Kumagai ◽  
Atsumi Niwa ◽  
Katsuhiko Hanzawa ◽  
Hidetaka Kato ◽  
Shinichiro Futami ◽  
...  
Keyword(s):  
Low Power ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Event Driven ◽  
Back Illuminated

A 50.1-Mpixel 14-Bit 250-frames/s Back-Illuminated Stacked CMOS Image Sensor With Column-Parallel kT/C-Canceling S&H and Δ ΣADC

2021 ◽  
pp. 1-1
Author(s):  
Chihiro Okada ◽  
Golan Zeituni ◽  
Koushi Uemura ◽  
Luong Hung ◽  
Kouji Matsuura ◽  
...  
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Back Illuminated

NOISE ANALYSIS AND DESIGN OF CURRENT ACCUMULATOR FOR TDI-CMOS IMAGE SENSOR

2013 ◽  
Vol 22 (10) ◽  
pp. 1340030
Author(s):  
JING GAO ◽  
JIANGTAO XU ◽  
TAO LUO ◽  
CEN GAO
Keyword(s):  
Model Simulation ◽  
Noise Analysis ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Digital Signals ◽  
Analysis And Design ◽  
Total Noise ◽  
Input Signals ◽  
The Relationship ◽  
The Ideal

The noise of the current accumulator is analyzed. A model of time-delay-integration (TDI) CMOS image sensor is presented, which is used to analyze the noise performance. In this model, input signals are accumulated four times by the type of current and then converted to digital signals to accomplish the other accumulation by 32 times, i.e., 4 × 32 accumulation mode. The noise, which includes switch charge injection, sample noise and kT/C noise, is considered in this model. The major source of the noise and the relationship between noise and sample capacitance are evaluated through the model simulation. The results indicate that the total noise can be restrained by increasing sample capacitance. When the input signal is arranging from 0 μA to 100 μA, the accuracy of the current accumulator can be 11 bits by using 1 pF sample capacitor. The SNR of the output signal can be increased by 20.38 dB which is close to the ideal result. The circuit of the current accumulator based on the model is also proposed.

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