90% yield production of polymer nano-memristor for in-memory computing

Polymer memristors with light weight and mechanical flexibility are preeminent candidates for low-power edge computing paradigms. However, the structural inhomogeneity of most polymers usually leads to random resistive switching characteristics, which lowers the production yield and reliability of nanoscale devices. In this contribution, we report that by adopting the two-dimensional conjugation strategy, a record high 90% production yield of polymer memristors has been achieved with miniaturization and low power potentials. By constructing coplanar macromolecules with 2D conjugated thiophene derivatives to enhance the π–π stacking and crystallinity of the thin film, homogeneous switching takes place across the entire polymer layer, with fast responses in 32 ns, D2D variation down to 3.16% ~ 8.29%, production yield approaching 90%, and scalability into 100 nm scale with tiny power consumption of ~ 10−15 J/bit. The polymer memristor array is capable of acting as both the arithmetic-logic element and multiply-accumulate accelerator for neuromorphic computing tasks.

Optimizing Convolutional Neural Network Accelerator on Low-Cost FPGA

Convolutional neural network (CNN) is one of the most promising algorithms that outweighs other traditional methods in terms of accuracy in classification tasks. However, several CNNs, such as VGG, demand a huge computation in convolutional layers. Many accelerators implemented on powerful FPGAs have been introduced to address the problems. In this paper, we present a VGG-based accelerator which is optimized for a low-cost FPGA. In order to optimize the FPGA resource of logic element and memory, we propose a dedicated input buffer that maximizes the data reuse. In addition, we design a low resource processing engine with the optimal number of Multiply Accumulate (MAC) units. In the experiments, we use VGG16 model for inference to evaluate the performance of our accelerator and achieve a throughput of 38.8[Formula: see text]GOPS at a clock speed of 150[Formula: see text]MHz on Intel Cyclone V SX SoC. The experimental results show that our design is better than previous works in terms of resource efficiency.