Optimasi Kinerja Web Menggunakan Application-Level Cache di Sisi Server dan Browser

INTISARIPenelitian ini bertujuan untuk melakukan optimasi kinerja web menggunakan application-level cache di sisi server dan browser. Penelitian ini disusun menggunakan 2 buah VPS 1 core, memori RAM 512MB, harddisk 40GB masing-masing untuk server web dan basis data, web server Apache 2.4 dengan PHP 7.1, basis data MariaDB v.10 dengan rekayasa 20 tabel dan 10 juta tupel. Pengambilan sampel menggunakan perulangan 5x dengan kombinasi tingkat kueri dan tingkat konkurensi yang berbeda. Data dikumpulkan menggunakan aplikasi Apica Zebra Tester. Hasil analisis data menunjukkan kombinasi konfigurasi cache memiliki pengaruh yang berbeda terhadap kinerja web. Tanpa cache, kecepatan waktu akses web melambat drastis hingga 27.078,91 milidetik pada 50 konkurensi akses dan perulangan 100 kueri dengan hasil 100.000 data/kueri dengan jeda waktu 5 detik per konkurensi.Hasil penelitian membuktikan bahwa konfigurasi cache di sisi browser memiliki pengaruh peningkatan kecepatan waktu akses rata-rata 79,61% dan penurunan beban CPU 80,83% tidak stabil ketika konkurensi akses dilakukan dengan profil browser berbeda. Konfigurasi cache di sisi server memiliki pengaruh peningkatan kecepatan waktu akses rata-rata 79,83% dan penurunan beban CPU 79,88%, stabil ketika konkurensi akses dilakukan dengan profil browser berbeda. Konfigurasi cache di sisi server dan browser memiliki peningkatan pengaruh kecepatan waktu akses rata-rata tertinggi 80,07% dan penurunan beban CPU tertinggi 82,64%, sangat stabil ketika konkurensi akses dilakukan dengan profil browser berbeda. Hasil uji membuktikan, konfigurasi application-level cache paling optimal menggunakan gabungan konfigurasi cache di sisi server dan browser. Kata Kunci : optimasi kinerja web, application-level cache, web cache, cache di sisi browser, cache di sisi serverABSTRACTThis research intends to optimizing web performance using application-level cache on server-side and browser-side. This research was arranged using 2 VPS with 1 core processor, 512MB RAM, 40GB SSD, Apache 2.4 web server with PHP 7.1, MariaDB v.10 database with 20 tables and 10 million tuples. Sampling in this research using 5x loop with various query-level dan qonqurrency level.. Data were collected using Apica Zebra Tester application. Data analysis result shows the combination of cache configurations have different effects on web performance. Without cache, web access time speeds slowed dramatically to 27,078.91 milliseconds on 50 access concurrencies and 100 queries recurring with 100,000 data/query with of 5 seconds delay per concurrency. The results show the browser-side cache configuration effect has 79,61% increasing response time access average and 80,83% decrease CPU load average, unstable when the concurrency access is done with different browser profiles. The server-side cache configuration effect has 79,83% increasing response time access average and 79,88% decrease CPU load average, stable when concurrency access is made with different browser profiles. The server-side and browser-side cache configuration effect has 80,07% increasing response time access average and 82,64% decrease CPU load average, very stable when concurrency access is performed with different browser profiles. The test results prove optimal application-level cache configuration uses a combination of server-side and browser-side. Keyword : web performance optimization, application-level cache, web cache, browser-side cache, server-side cache

Designing of High Performance Multicore Processor with Improved Cache Configuration and Interconnect

The growing number of cores increases the demand for a powerful memory subsystem which leads to enhancement in the size of caches in multicore processors. Caches are responsible for giving processing elements a faster, higher bandwidth local memory to work with. In this chapter, an attempt has been made to analyze the impact of cache size on performance of Multi-core processors by varying L1 and L2 cache size on the multicore processor with internal network (MPIN) referenced from NIAGRA architecture. As the number of core's increases, traditional on-chip interconnects like bus and crossbar proves to be low in efficiency as well as suffer from poor scalability. In order to overcome the scalability and efficiency issues in these conventional interconnect, ring based design has been proposed. The effect of interconnect on the performance of multicore processors has been analyzed and a novel scalable on-chip interconnection mechanism (INOC) for multicore processors has been proposed. The benchmark results are presented by using a full system simulator. Results show that, using the proposed INoC, compared with the MPIN; the execution time are significantly reduced.