datapath architecture Latest Research Papers

Low Power Datapath Architecture for Multiply - Accumulate (MAC) Unit

2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT) ◽

10.1109/rteict46194.2019.9016717 ◽

2019 ◽

Author(s):

H R Spoorthi ◽

C P Narendra ◽

U Chandra Mohan

Keyword(s):

Low Power ◽

Datapath Architecture

Enhanced SPIHT Algorithm with Pipelined Datapath Architecture Design

Istanbul University - Journal of Electrical & Electronics Engineering ◽

10.26650/electrica.2018.15101 ◽

2019 ◽

Vol 19 (1) ◽

pp. 29-36

Author(s):

Serap Cekli ◽

◽

Ali Akman ◽

Keyword(s):

Architecture Design ◽

Spiht Algorithm ◽

Datapath Architecture

Parallel compression/decompression-based datapath architecture for multibeam mask writers

Journal of Micro/Nanolithography MEMS and MOEMS ◽

10.1117/1.jmm.16.4.043503 ◽

2017 ◽

Vol 16 (04) ◽

pp. 1

Keyword(s):

Datapath Architecture

Parallel compression/decompression-based datapath architecture for multibeam mask writers

33rd European Mask and Lithography Conference ◽

10.1117/12.2279737 ◽

2017 ◽

Author(s):

Narendra Chaudhary ◽

Serap Savari

Keyword(s):

Datapath Architecture

Design Space Exploration of Datapath (Architecture) in High-Level Synthesis for Computation Intensive Applications

Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems ◽

10.1007/978-81-322-1958-3_6 ◽

2014 ◽

pp. 93-111 ◽

Cited By ~ 1

Author(s):

Anirban Sengupta

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

High Level Synthesis ◽

High Level ◽

Datapath Architecture

Placement for the Reconfigurable Datapath Architecture

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1464977 ◽

2005 ◽

Author(s):

Yen-Tai Lai ◽

Hsin-Ya Lai ◽

Chia-Nan Yeh

Keyword(s):

Datapath Architecture

A run-time reconfigurable datapath architecture for image processing applications

Proceedings Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2004.1269237 ◽

2004 ◽

Cited By ~ 1

Author(s):

M.R. Boschetti ◽

I.S. Silva ◽

S. Bampi

Keyword(s):

Image Processing ◽

Run Time ◽

Datapath Architecture

An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) ◽

10.1109/cicc.2002.1012790 ◽

2003 ◽

Cited By ~ 3

Author(s):

M. Miyama ◽

O. Tooyama ◽

N. Takamatsu ◽

T. Kodake ◽

K. Nakamura ◽

...

Keyword(s):

Motion Estimation ◽

Low Power ◽

Gradient Descent ◽

Search Algorithm ◽

Ultra Low Power ◽

Processor Core ◽

Datapath Architecture

Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03 ◽

10.1145/764808.764848 ◽

2003 ◽

Cited By ~ 2

Author(s):

Geoff Knagge ◽

David Garrett ◽

Sivarama Venkatesan ◽

Chris Nicol

Keyword(s):

Datapath Architecture

Datapath architecture and technology for large scale ATM switching systems

Proceedings of GLOBECOM'96. 1996 IEEE Global Telecommunications Conference ◽

10.1109/glocom.1996.587675 ◽

2002 ◽

Cited By ~ 4

Author(s):

A. Takase ◽

T. Kozaki ◽

M. Takatori ◽

H. Abe

Keyword(s):

Large Scale ◽

Switching Systems ◽

Datapath Architecture

datapath architecture
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Low Power Datapath Architecture for Multiply - Accumulate (MAC) Unit

Enhanced SPIHT Algorithm with Pipelined Datapath Architecture Design

Parallel compression/decompression-based datapath architecture for multibeam mask writers

Parallel compression/decompression-based datapath architecture for multibeam mask writers

Design Space Exploration of Datapath (Architecture) in High-Level Synthesis for Computation Intensive Applications

Placement for the Reconfigurable Datapath Architecture

A run-time reconfigurable datapath architecture for image processing applications

An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm

Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

Datapath architecture and technology for large scale ATM switching systems

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datapath architectureRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Low Power Datapath Architecture for Multiply - Accumulate (MAC) Unit

Enhanced SPIHT Algorithm with Pipelined Datapath Architecture Design

Parallel compression/decompression-based datapath architecture for multibeam mask writers

Parallel compression/decompression-based datapath architecture for multibeam mask writers

Design Space Exploration of Datapath (Architecture) in High-Level Synthesis for Computation Intensive Applications

Placement for the Reconfigurable Datapath Architecture

A run-time reconfigurable datapath architecture for image processing applications

An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm

Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

Datapath architecture and technology for large scale ATM switching systems

datapath architecture
Recently Published Documents