ram testing
Recently Published Documents

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Basics of Functional RAM Testing

Multi-run Memory Tests for Pattern Sensitive Faults ◽

10.1007/978-3-319-91204-2_2 ◽

2018 ◽

pp. 5-13

Author(s):

Ireneusz Mrozek

Keyword(s):

Ram Testing

Low Power Ram Testing using Bist in VHDL

International Journal of Engineering Research and ◽

10.17577/ijertv5is050597 ◽

2016 ◽

Vol V5 (05) ◽

Author(s):

Ritu Singh Thakur ◽

Akanksha Awasthi ◽

Keyword(s):

Low Power ◽

Ram Testing

Challenges in standardizing RAM testing for small unmanned robotic systems

2013 Proceedings Annual Reliability and Maintainability Symposium (RAMS) ◽

10.1109/rams.2013.6517627 ◽

2013 ◽

Cited By ~ 1

Author(s):

S. Sheng ◽

Nicole Becker

Keyword(s):

Robotic Systems ◽

Ram Testing

Nondestructive RAM testing based on multiple signature comparison

Automatic Control and Computer Sciences ◽

10.3103/s0146411609040014 ◽

2009 ◽

Vol 43 (4) ◽

pp. 173-178

Author(s):

S. V. Yarmolik ◽

V. N. Yarmolik

Keyword(s):

Ram Testing

Determination of the optimal initial states for multiple-run RAM testing

Automatic Control and Computer Sciences ◽

10.3103/s0146411608030024 ◽

2008 ◽

Vol 42 (3) ◽

pp. 120-125 ◽

Cited By ~ 1

Author(s):

S. V. Yarmolik ◽

A. N. Kurbatskii ◽

V. N. Yarmolik

Keyword(s):

Ram Testing ◽

Initial States

Dual port static RAM testing

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207822 ◽

2003 ◽

Cited By ~ 26

Author(s):

M.J. Raposa

Keyword(s):

Ram Testing ◽

Static Ram

A new class of fault models and test algorithms for dual-port dynamic RAM testing

Records of the 1993 IEEE International Workshop on Memory Testing ◽

10.1109/mt.1993.263147 ◽

2002 ◽

Cited By ~ 1

Author(s):

V. Castro Alves ◽

O. Kebichi ◽

A. Ferreira

Keyword(s):

Fault Models ◽

New Class ◽

Ram Testing

RAM testing algorithms for detection multiple linked faults

Proceedings ED&TC European Design and Test Conference ◽

10.1109/edtc.1996.494337 ◽

2002 ◽

Cited By ~ 13

Author(s):

V.G. Mikitjuk ◽

V.N. Yarmolik ◽

A.J. van de Goor

Keyword(s):

Ram Testing ◽

Testing Algorithms

Embedded RAM testing

Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing ◽

10.1109/mtdt.1995.518078 ◽

2002 ◽

Cited By ~ 1

Author(s):

M. Franklin ◽

K.K. Saluja

Keyword(s):

Ram Testing

Defect Oriented RAM Testing and Current Testable RAMs

Defect Oriented Testing for CMOS Analog and Digital Circuits - Frontiers in Electronic Testing ◽

10.1007/978-1-4757-4926-7_5 ◽

1999 ◽

pp. 133-204

Author(s):

Manoj Sachdev

Keyword(s):

Ram Testing

ram testingRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Basics of Functional RAM Testing

Low Power Ram Testing using Bist in VHDL

Challenges in standardizing RAM testing for small unmanned robotic systems

Nondestructive RAM testing based on multiple signature comparison

Determination of the optimal initial states for multiple-run RAM testing

Dual port static RAM testing

A new class of fault models and test algorithms for dual-port dynamic RAM testing

RAM testing algorithms for detection multiple linked faults

Embedded RAM testing

Defect Oriented RAM Testing and Current Testable RAMs

ram testing
Recently Published Documents