serial link receivers Latest Research Papers

2019 ◽

Vol 9 (3) ◽

pp. 536-548 ◽

Cited By ~ 2

Author(s):

Shiva Kiran ◽

Ayman Shafik ◽

Ehsan Zhian Tabasy ◽

Shengchang Cai ◽

Keytaek Lee ◽

...

Keyword(s):

Serial Link ◽

Serial Link Receivers

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A study of analog decision feedback equalization for ADC-Based serial link receivers

Integration ◽

10.1016/j.vlsi.2018.09.003 ◽

2019 ◽

Vol 64 ◽

pp. 114-126

Author(s):

Azad Mahmoudi ◽

Pooya Torkzadeh ◽

Massoud Dousti

Keyword(s):

Decision Feedback ◽

Serial Link ◽

Decision Feedback Equalization ◽

Serial Link Receivers

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A 24-mW 65-nm CMOS TI-Flash ADC for multi-standard serial-link receivers

2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2016.7869959 ◽

2016 ◽

Cited By ~ 4

Author(s):

Khaled A. El-Gammal ◽

Sameh A. Ibrahim

Keyword(s):

Serial Link ◽

Flash Adc ◽

Serial Link Receivers

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Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS

2011 IEEE Custom Integrated Circuits Conference (CICC) ◽

10.1109/cicc.2011.6055365 ◽

2011 ◽

Author(s):

Kangmin Hu ◽

Tao Jiang ◽

Sam Palermo ◽

Patrick Yin Chiang

Keyword(s):

Low Power ◽

Injection Locking ◽

Serial Link ◽

Harmonic Injection ◽

Serial Link Receivers ◽

Near Threshold

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Low-Blind-Period Differential Sampler for High-Speed Serial Link Receivers

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2011.2158716 ◽

2011 ◽

Vol 58 (8) ◽

pp. 497-501

Author(s):

Jingcheng Zhuang

Keyword(s):

High Speed ◽

Serial Link ◽

Serial Link Receivers

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A Merged CMOS Digital Near-End Crosstalk Canceller and Analog Equalizer for Multi-Lane Serial-Link Receivers

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2009.2037474 ◽

2010 ◽

Vol 45 (2) ◽

pp. 433-446 ◽

Cited By ~ 4

Author(s):

Jian-Hao Lu ◽

Shen-Iuan Liu

Keyword(s):

Serial Link ◽

Serial Link Receivers

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A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers

2008 IEEE Symposium on VLSI Circuits ◽

10.1109/vlsic.2008.4585950 ◽

2008 ◽

Author(s):

Jian-Hao Lu ◽

Ke-Hou Chen ◽

An-Ming Lee ◽

Ting-Ying Wu ◽

Shen-Iuan Liu

Keyword(s):

Serial Link ◽

Serial Link Receivers

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Equalization and Clock and Data Recovery Techniques for 10-Gb/s CMOS Serial-Link Receivers

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2007.903076 ◽

2007 ◽

Vol 42 (9) ◽

pp. 1999-2011 ◽

Cited By ~ 134

Author(s):

S.. Gondi ◽

B.. Razavi

Keyword(s):

Clock And Data Recovery ◽

Data Recovery ◽

Serial Link ◽

Recovery Techniques ◽

Serial Link Receivers

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A 10-Gb/s CMOS Merged Adaptive Equalizer/CDR Circuit for Serial-Link Receivers

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. ◽

10.1109/vlsic.2006.1705376 ◽

2006 ◽

Cited By ~ 6

Author(s):

S. Gondi ◽

B. Razavi

Keyword(s):

Adaptive Equalizer ◽

Serial Link ◽

Serial Link Receivers

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serial link receivers
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Modeling of ADC-Based Serial Link Receivers With Embedded and Digital Equalization

A study of analog decision feedback equalization for ADC-Based serial link receivers

A 24-mW 65-nm CMOS TI-Flash ADC for multi-standard serial-link receivers

Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS

Low-Blind-Period Differential Sampler for High-Speed Serial Link Receivers

A Merged CMOS Digital Near-End Crosstalk Canceller and Analog Equalizer for Multi-Lane Serial-Link Receivers

A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers

Equalization and Clock and Data Recovery Techniques for 10-Gb/s CMOS Serial-Link Receivers

A 10-Gb/s CMOS Merged Adaptive Equalizer/CDR Circuit for Serial-Link Receivers

Export Citation Format

serial link receiversRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Modeling of ADC-Based Serial Link Receivers With Embedded and Digital Equalization

A study of analog decision feedback equalization for ADC-Based serial link receivers

A 24-mW 65-nm CMOS TI-Flash ADC for multi-standard serial-link receivers

Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS

Low-Blind-Period Differential Sampler for High-Speed Serial Link Receivers

A Merged CMOS Digital Near-End Crosstalk Canceller and Analog Equalizer for Multi-Lane Serial-Link Receivers

A merged CMOS digital near-end crosstalk canceller and analog equalizer for multi-lane serial-link receivers

Equalization and Clock and Data Recovery Techniques for 10-Gb/s CMOS Serial-Link Receivers

A 10-Gb/s CMOS Merged Adaptive Equalizer/CDR Circuit for Serial-Link Receivers

serial link receivers
Recently Published Documents