Numerical Simulation of Nanoscale Double-Gate MOSFETs

The further improvement of nanoscale electron devices requires support by numerical simulations within the design process. After a brief description of our SIMBA 2D/3D-device simulator, the results of the simulation of DG-MOSFETs are represented. Starting from a basic structure with a gate length of 30 nm, the model parameters were calibrated on the basis measured values from the literature. Afterwards variations in of gate length, channel thickness and doping, gate oxide parameters and source/drain doping were made in connection with numerical calculation of the device characteristics. Then a DG-MOSFET with a gate length of 15 nm was optimized. The optimized structure shows suppressed short channel behavior and short switching times of about 0.15 ps.