Temperature dependent Band gap Correction model using tight-binding approach for UTB device simulations

<div>Ultra-thin body (UTB) devices are being used in many electronic applications operating over a wide range of temperatures. The electrostatics of these devices depends on the band structure of the channel material, which varies with temperature as well as channel thickness. The semi-empirical tight binding (TB) approach is widely used for calculating channel thickness dependent band structure of any material, at a particular temperature, where TB parameters are defined. For elementary semiconductors like Si, Ge and compound semiconductors like GaAs, these TB parameters are generally defined at only 0 K and 300 K. This limits the ability of the TB approach to simulate the electrostatics of these devices at any other intermediate temperatures.</div><div>In this work, we analyze the variation of band structure for Si, Ge and GaAs over different channel thicknesses at 0 K and 300 K (for which TB parameters are available), and show that the band curvature at the band minima has minor variation with temperature, whereas the change of band gap significantly affects the channel electrostatics. Based on this finding, we propose an approach to simulate the electrostatics of UTB devices, at any temperature between 0 K and 300 K, using TB parameters defined at 0 K, along with a suitable channel thickness and temperature dependent band gap correction. </div>

Temperature dependent Band gap Correction model using tight-binding approach for UTB device simulations

<div>Ultra-thin body (UTB) devices are being used in many electronic applications operating over a wide range of temperatures. The electrostatics of these devices depends on the band structure of the channel material, which varies with temperature as well as channel thickness. The semi-empirical tight binding (TB) approach is widely used for calculating channel thickness dependent band structure of any material, at a particular temperature, where TB parameters are defined. For elementary semiconductors like Si, Ge and compound semiconductors like GaAs, these TB parameters are generally defined at only 0 K and 300 K. This limits the ability of the TB approach to simulate the electrostatics of these devices at any other intermediate temperatures.</div><div>In this work, we analyze the variation of band structure for Si, Ge and GaAs over different channel thicknesses at 0 K and 300 K (for which TB parameters are available), and show that the band curvature at the band minima has minor variation with temperature, whereas the change of band gap significantly affects the channel electrostatics. Based on this finding, we propose an approach to simulate the electrostatics of UTB devices, at any temperature between 0 K and 300 K, using TB parameters defined at 0 K, along with a suitable channel thickness and temperature dependent band gap correction. </div>

(100) Plane ß-Ga2O3 Flake Based Field Effect Transistor and Its Hydrogen Response

2-dimensional (100) plane β phase Ga2O3 (β-Ga2O3) flake based field effect transistor (FET) was fabricated, and its electrical characteristics was analyzed. The (100) plane β-Ga2O3 flake was mechanically exfoliated from the side wall of (2 ̅01) plane β-Ga2O3 bulk substrate. The minimum thickness of 57.3 nm was obtained for the very thin (100) plane β-Ga2O3 channel layer of the FET using inductively coupled plasma etching with BCl3/N2 chemistry. The current-voltage characteristics of the FET with various β-Ga2O3 channel thickness was investigated. The dependence of the channel thickness on the drain current density, threshold voltage, transconductance, and field effect mobility was studied. The hydrogen response of the (100) plane Ga2O3 flake based FET with catalytic Pt gate surface was measured in the range of 10-500 ppm at 400˚C, and modeled with a dissociative Langmuir isotherm. The device showed a reliable responsivity to the different concentration of hydrogen exposure, and the responsivity of 25.02% was observed for the 500 ppm hydrogen at 400˚C.

Effects of Channel Thickness on Electrical Performance and Stability of High-Performance InSnO Thin-Film Transistors

InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness (tITO, respectively, 6, 9, 12, and 15 nm) on device performance and positive bias stress (PBS) stability of the ITO TFTs are examined. We found that content of oxygen defects positively correlates with tITO, leading to increases of both trap states as well as carrier concentration and synthetically determining electrical properties of the ITO TFTs. Interestingly, the ITO TFTs with a tITO of 9 nm exhibit the best performance and PBS stability, and typical electrical properties include a field-effect mobility (µFE) of 37.69 cm2/Vs, a Von of −2.3 V, a SS of 167.49 mV/decade, and an on–off current ratio over 107. This work paves the way for practical application of the ITO TFTs.

Velocity Dependence and Tracer Dispersion in Newtonian Fluids Undergoing Creeping Flow

The dynamics of tracer particles in a viscous Newtonian fluid is studied analytically and numerically through channels of varying thickness for fluids undergoing creeping flow. Exact analytical solutions of mass conservation equations of tracer particles including consideration for pressure forces are obtained. Results of the analysis indicates that Stokes velocity is an indispensable parameter and is dependent on parameters such as channel thickness (height), viscosity of the fluid, pressure gradient driven the fluid and Reynolds number corresponding to the channel thickness. The accuracy of the solution obtained is verified by comparing its velocity profiles with those obtained from finite-element-based numerical simulation studies.

Role of Layer Thickness and Field-Effect Mobility on Photoresponsivity of Indium Selenide (InSe) Based Phototransistors

Understanding and optimizing the properties of photoactive two-dimensional (2D) Van der Waals solids is crucial for developing optoelectronics applications. The main goal of this work is to present a detailed investigation of layer dependent photoconductive behavior of InSe based field-effect transistors (FETs). InSe based FETs with five different channel thicknesses (t, 20nm &lt; t &lt; 100nm) were investigated with a continuous laser source of λ = 658 nm (1.88 eV) over a wide range of illumination power (P) of 22.8 nW &lt; P &lt; 1.29 μW. All the devices studied showed signatures of photogating; however, our investigations suggest that the photoresponsivities are strongly dependent on the thickness of the conductive channel. A correlation between the field-effect mobility (µFE) values (as a function of channel thickness, t) and photoresponsivity (R) indicates that in general R increases with increasing µFE (decreasing t) and vice versa. Maximum responsivities of ∼ 7.84 A/W and ∼ 0.59 A/W were obtained the devices with t = 20nm and t = 100nm, respectively. These values could substantially increase under the application of a gate voltage. The structure-property correlation-based studies presented here indicate the possibility of tuning the optical properties of InSe based photo-FETs for a variety of applications related to photodetector and/or active layers in solar cells.

Simulation of β - Ga2O3 based MOSFETs for Depletion and Enhancement Mode Operation

This paper reports on TCAD-simulation of beta-gallium oxide ( β - Ga 2 O 3 ) MOSFET with the channel recessed into a 1 µ m thick Si-doped (1 × 10 18 cm - 3) epitaxial layer. We optimized gate recess thickness to achieve both, depletion and enhancement mode operation. The simulated β - Ga2O3 MOSFET structures show optimum depletion-mode and enhancement-mode characteristics for 150 nm and 15 nm active channel thickness, respectively. A comparative study is also done to analyze the thermal and electrical effects by simulating hetero-epitaxial β - Ga 2O3 layer on sapphire substrate and homoepitaxial β - Ga2O3 layer on β - Ga 2 O 3 substrate. MOSFET devices based on β - Ga 2 O 3 layers on sapphire substrates show improved performance compared to devices based on β - Ga2O3 layers on β - Ga 2 O 3 substrates in terms of drain current, trans-conductance and breakdown voltage. β - Ga 2 O 3 epitaxial layers on sapphire substrates exhibit a drain current density of 77.7 mA/mm with a peak trans-conductance of 2.28 mS/mm for D-mode operation and 27.3 mA/mm drain current density with a peak trans-conductance of 3.92 mS/mm for E-mode operation. In contrast, MOSFET devices based on β - Ga 2 O 3 epitaxial layers on β - Ga 2 O 3 substrates show a drain current density of 64.1 mA/mm for D-mode operation and 22.2 mA/mm drain current density with 3.2 mS/mm peak trans-conductance for E-mode operation. MOSFET devices based on β - Ga 2 O 3 epitaxial structures on sapphire and on β - Ga 2 O 3 substrates show reliable switching properties with sub-threshold swing of 95.98 mV/dec and 87.05 mV/dec respectively as well as a high I on =I off ratio of 10 11 . These simulation results show potential of laterally scaled β - Ga 2 O 3 MOSFETs for power switching applications.