circuit graph
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Author(s):  
Zijian Deng ◽  
Bin Liu ◽  
Bofeng Huo ◽  
Bo Deng

Let [Formula: see text] be the [Formula: see text]th-order circuit graph of a simple connected matroid M. The first-order circuit graph is also called a circuit graph. There are lots of results about connectivity and Hamiltonian properties of circuit graph of matroid, while there are few related results on the second-order circuit graph of a matroid. This paper mainly focuses on the connectivity and Hamiltonian properties of the second-order circuit graphs of the cycle matroid of wheels. It determines the minimum degree and connectivity of these graphs, and proves that the second-order circuit graph of the cycle matroid of a wheel is uniformly Hamiltonian.


2010 ◽  
Vol 40-41 ◽  
pp. 133-139 ◽  
Author(s):  
Jin Xue Sui ◽  
Li Yang ◽  
Yun An Hu ◽  
Zhi Lin Zhu

Based on the periodically forced dynamic qualities of the blood circulation system, this paper considered from network and hemodynamics, establishes plane structure diagram of the cerebral circulation. According to the electric circuit graph theory and blood dynamics equation, applies the averaging method to find an approximate solution of this equation. We apply this method in the cerebrovascular network that may help to explain the development processes of venous diseases. Simulation shows that computing result is consistent with blood flow change phenomenon of the clinical observation cerebral infarction.


2010 ◽  
Vol 106 (1) ◽  
pp. 50 ◽  
Author(s):  
Eric Emtander

In this paper we introduce a class of hypergraphs that we call chordal. We also extend the definition of triangulated hypergraphs, given by H. T. Hà and A. Van Tuyl, so that a triangulated hypergraph, according to our definition, is a natural generalization of a chordal (rigid circuit) graph. R. Fröberg has showed that the chordal graphs corresponds to graph algebras, $R/I(\mathcal{G})$, with linear resolutions. We extend Fröberg's method and show that the hypergraph algebras of generalized chordal hypergraphs, a class of hypergraphs that includes the chordal hypergraphs, have linear resolutions. The definitions we give, yield a natural higher dimensional version of the well known flag property of simplicial complexes. We obtain what we call $d$-flag complexes.


10.37236/459 ◽  
2010 ◽  
Vol 17 (1) ◽  
Author(s):  
Qing Cui

We give a short proof of Gao and Richter's theorem that every circuit graph contains a closed walk visiting each vertex once or twice.


VLSI Design ◽  
1998 ◽  
Vol 5 (4) ◽  
pp. 333-345 ◽  
Author(s):  
A. Morosow ◽  
V. V. Saposhnikov ◽  
Vl. V. Saposhnikov ◽  
M. Goessel

In this paper we propose a structure dependent method for the systematic design of a self-checking circuit which is well adapted to the fault model of single gate faults and which can be used in test mode.According to the fault model considered, maximal groups of independent and unidirectionally independent outputs of an arbitrarily given combinational circuit are determined. A parity bit is added to every group of independent outputs. A few additional outputs are added to every group of unidirectionally independent outputs. In the error free case, these groups of unidirectional independent outputs together with their corresponding additional outputs are elements of a unidirectional error detecting code; for example, a Berger code or an r-out-of-s code.It is demonstrated how the pairs of (unidirectionally) independent outputs of a given circuit can be determined. A simple heuristic solution for this problem based on a modified circuit graph is also given.The maximal classes of (unidirectionally) independent outputs can be computed as cliques of a dependency graph where the nodes of the graph are the outputs of the circuit. The applicability of the proposed method is demonstrated for the MCNC benchmarks circuits.


1980 ◽  
Vol 7 (1-3) ◽  
pp. 181-186
Author(s):  
Walter Ulbrich ◽  
Rudolf Van Der Leeden

A computer-aided topological hybrid layout-design procedure is proposed, that yields the wanted principal routing in the form of a geometrical planarization graph. A so-called grid-embedding of a circuit graph into the Euklidean plane enables us to observe all except one of the various technological constraints. The real problem is reduced to finding a proper arrangement of “nets” and “flocks” in the plane in order to meet the omitted cross-capacity constraint. The solution is accomplished by a constructive and implicit enumeration procedure, which is used within an interactive man-machine design process.


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