A Review on SECS/GEM: A Machine-to-Machine (M2M) Communication Protocol for Industry 4.0

Industry 4.0 has imminently emerged as the fourth industrial revolution. It garners emphasis primarily on the interaction between factory equipment and machines involved in entire value-chain activities for boosting efficiency and production with limited human intervention. The M2M communication protocols have gained significant prominence amidst sage minds in recent years, particularly in the manufacturing industries. Several M2M communication protocols have been developed for the industry, such as SECS/GEM, OPC UA, DDS, and MQTT. Among these protocols, SECS/GEM is a semiconductor’s equipment interface protocol for equipment-to-host data communications. It is not a modern, but decades-long protocol, and has been again brought to the fore by Industry 4.0. Thereupon, it was imperative to review amenability of SECS/GEM protocol in the context of adaptation of features depicted by industry 4.0, and limelight plethora of shortcomings and limitations. In this paper, comparisons of prominent features and limitations of the aforementioned M2M communication protocols in general and review of the SECS/GEM protocol in particular, have been made. Findings include deficiencies in security, point to point communication, discovery mechanism, fixed message format, interoperability, extendibility, and manual integration.

Design & Verification of Serial Peripheral Interface (SPI) Protocol

SPI (Serial Peripheral Interface), which was introduced by the company Motorola, and it is a protocol for communication of serial synchronous about the communication among the master and slave device, which is also used to provide communiqué between microcontroller and many devices which are additional and similar to external Analog to the Digital Converters, Digital to Analog Converters, and EEPROMs. Now a days, communication protocols are at low end. There are two different Protocols: 1) Inter-I2C and 2) SPI. Both of these protocols are well designed for the communications between the Integrated Circuits for communication with On-Board Peripherals. SPI is most commonly used protocol for both intra-chip and inter-chip, and is used at low or medium speed of data-stream transfer. This paper introduces about the quality of SPI Interface Protocol with Single Master and Single Slave configuration, which involves 8-bit of the data transfer and all necessary incorporates features that required for modern applications such as ASIC or SOC (System on Chip). The SPI design is verified and implemented by using System Verilog to show their coverage code and their functional correctness, the entire RTL was written using Verilog for Synthesis and then the Verification architecture is written using System Verilog. The implementation is done using Spartan 3E.