Cerebral localization of higher functions: Memory-related anatomic structures

ABSTRACT The nature of memory and the search for its localization have been a subject of interest since Antiquity. After millennia of theoretical concepts, shifting from the heart to the brain, then from the ventricles to solid parts, the core memory-related structures finally began to be identified through modern scientifically-based methods at the diencephalic and cortical (hippocampal and neocortical) levels, mostly in the late Modern period, culminating in the current state of knowledge on the subject.

Development of a cycle-accurate simulator of the Elbrus processor core memory subsystem

Increasing complexity of modern microprocessors, combined with semiconductor technology progress slowdown, make a further increase in performance more difficult. Under these circumstances, the relevance of the performance estimations of prospective microprocessors by dint of cycle-accurate simulation prior to their production in silicon is of growing importance. The approach to implementation of cycle-accurate simulator of core memory subsystem for Elbrus architecture, controlled by the existing functional simulator of this architecture, is presented herein. The method for validation of a cycleaccurate simulator by comparison with modeling of the RTL description of the prospective microprocessor is considered. The data on the speed of the cycle-accurate simulator and the main optimization methods, which were used to achieve acceptable performance, are presented. The preliminary estimates of the impact on the performance of some changes in the prospective processor core, including the cache access latency and hardware support for virtualization, obtained with the help of the cycle-accurate simulator are given. These assessments are important for making architectural decisions when designing the prospective Elbrus architecture processors.

The integrative memory model is detailed, but skimps on false memories and development

The integrative memory model combines five core memory systems with an attributional system. We agree with Bastin et al. that this melding is the most novel aspect of the model. But we await further evidence that the model's substantial complexity informs our understanding of false memories or of the development of recollection and familiarity.

Trident : An Automated System Tool for Collecting and Analyzing Performance Counters

Trident, a qualitative analysis tool that can look at various low level metrics with respect to the Core, Memory and I/O to highlight performance bottlenecks during the execution of an application. Trident uses a three pronged approach in analysing a node's utilisation of hardware resources and to help a non system expert understand the stress on different parts of the system by a given job. Currently metrics such as memory bandwidth, core utilization, active processor cyles, etc., are being collected. Interpretation of the data in raw form is often non intuitive. Therefore, the tool converts these data into derived metrics that are then represented as a system wide extended Top-Down analysis that helps developers and site managers likewise understand the application behavior without the need for in-depth expertise of architecture details.