Active ESD protection for input transistors in a 40-nm CMOS process

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114533 ◽

2015 ◽

Cited By ~ 4

Author(s):

Federico A. Altolaguirre ◽

Ming-Dou Ker

Keyword(s):

Cmos Process ◽

Esd Protection

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ESD protection design for Giga-Hz high-speed I/O interfaces in a 130-nm CMOS process

2007 IEEE International SOC Conference ◽

10.1109/socc.2007.4545474 ◽

2007 ◽

Cited By ~ 1

Author(s):

Yuan-Wen Hsiao ◽

Ming-Dou Ker ◽

Po-Yen Chiu ◽

Chun Huang ◽

Yuh-Kuang Tseng

Keyword(s):

High Speed ◽

Cmos Process ◽

Esd Protection

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Substrate-triggered technique for on-chip ESD protection design in a 0.18-μm salicided CMOS process

IEEE Transactions on Electron Devices ◽

10.1109/ted.2003.812495 ◽

2003 ◽

Vol 50 (4) ◽

pp. 1050-1057 ◽

Cited By ~ 15

Author(s):

Ming-Dou Ker ◽

Tung-Yang Chen

Keyword(s):

Cmos Process ◽

Esd Protection ◽

On Chip

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MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process

IEICE Transactions on Electronics ◽

10.1093/ietele/e88-c.3.429 ◽

2005 ◽

Vol E88-C (3) ◽

pp. 429-436 ◽

Cited By ~ 1

Author(s):

M.-D. KER

Keyword(s):

Deep Submicron ◽

Cmos Process ◽

Esd Protection ◽

Submicron Cmos ◽

On Chip

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Optimization of LDMOS-SCR Device For ESD Protection Based On 0.5 μm CMOS Process

2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo) ◽

10.1109/emccompo.2019.8919854 ◽

2019 ◽

Author(s):

Xiangliang Jin ◽

Yang Wang ◽

Zeyu Zhong

Keyword(s):

Cmos Process ◽

Esd Protection

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ESD protection design for wideband RF applications in 65-nm CMOS process

2014 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2014.6865426 ◽

2014 ◽

Cited By ~ 1

Author(s):

Li-Wei Chu ◽

Chun-Yu Lin ◽

Ming-Dou Ker ◽

Ming-Hsiang Song ◽

Jen-Chou Tseng ◽

...

Keyword(s):

Cmos Process ◽

Esd Protection ◽

Rf Applications

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Robust ESD Protection Design for 40-Gb/s Transceiver in 65-nm CMOS Process

IEEE Transactions on Electron Devices ◽

10.1109/ted.2013.2279408 ◽

2013 ◽

Vol 60 (11) ◽

pp. 3625-3631 ◽

Cited By ~ 3

Author(s):

Chun-Yu Lin ◽

Li-Wei Chu ◽

Ming-Dou Ker

Keyword(s):

Cmos Process ◽

Esd Protection

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On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) ◽

10.1109/vtsa.2001.934529 ◽

2002 ◽

Cited By ~ 2

Author(s):

Chyh-Yih Chang ◽

Ming-Dou Ker

Keyword(s):

Integrated Circuits ◽

Cmos Process ◽

Rf Integrated Circuits ◽

Esd Protection ◽

On Chip

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ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process

IEEE Transactions on Microwave Theory and Techniques ◽

10.1109/tmtt.2011.2178425 ◽

2012 ◽

Vol 60 (3) ◽

pp. 714-723 ◽

Cited By ~ 15

Author(s):

Chun-Yu Lin ◽

Li-Wei Chu ◽

Ming-Dou Ker

Keyword(s):

Cmos Process ◽

60 Ghz ◽

Esd Protection

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Novel diode structures and ESD protection circuits in a 1.8-V 0.15-μm partially-depleted SOI salicided CMOS process

Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548) ◽

10.1109/ipfa.2001.941462 ◽

2002 ◽

Author(s):

Ming-Dou Ker ◽

Kei-Kang Hung ◽

H.T.-H. Tang ◽

S.-C. Huang ◽

S.-S. Chen ◽

...

Keyword(s):

Cmos Process ◽

Esd Protection ◽

Protection Circuits

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ESD protection structure with inductor-triggered SCR for RF applications in 65-nm CMOS process

2012 IEEE International Reliability Physics Symposium (IRPS) ◽

10.1109/irps.2012.6241893 ◽

2012 ◽

Cited By ~ 2

Author(s):

Chun-Yu Lin ◽

Li-Wei Chu ◽

Ming-Dou Ker ◽

Ming-Hsiang Song ◽

Chewn-Pu Jou ◽

...

Keyword(s):

Cmos Process ◽

Esd Protection ◽

Rf Applications

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