Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00
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Why interconnect prediction doesn't work

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333044 ◽

2000 ◽

Author(s):

Lou Scheffer ◽

Eric Nequist

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Theoretical limits for signal reflections due to inductance for on-chip interconnections

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333033 ◽

2000 ◽

Author(s):

D. Deschacht ◽

G. Servel ◽

F. Huret ◽

E. Paleczny ◽

P. Kennis

Keyword(s):

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Efficient representation of interconnection length distributions using generating polynomials

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333039 ◽

2000 ◽

Author(s):

Dirk Stroobandt ◽

Herwig Van Marck

Keyword(s):

Efficient Representation

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Gigascale integration (GSI) interconnect limits and n-tier multilevel interconnect architectural solutions (discussion session)

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333045 ◽

2000 ◽

Author(s):

Jeff A. Davis ◽

Raguraman Venkatesan ◽

Keith Bowman ◽

James D. Meindl

Keyword(s):

Discussion Session ◽

Gigascale Integration

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Cost based tradeoff analysis of standard cell designs

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333043 ◽

2000 ◽

Author(s):

Peng Li ◽

Pranab K. Nag ◽

Wojciech Maly

Keyword(s):

Standard Cell ◽

Tradeoff Analysis

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Prediction of interconnect fan-out distribution using Rent's rule

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333040 ◽

2000 ◽

Author(s):

Payman Zarkesh-Ha ◽

Jeffrey A. Davis ◽

William Loh ◽

James D. Meindl

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Power supply design parameters prediction for high performance IC design flows

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333034 ◽

2000 ◽

Author(s):

M. Graziano ◽

M. Delaurenti ◽

M. Zamboni

Keyword(s):

Power Supply ◽

High Performance ◽

Design Parameters ◽

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Performance analysis and technology of 3-D ICs

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333037 ◽

2000 ◽

Author(s):

Krishna C. Saraswat ◽

Shukri J. Souri ◽

Kaustav Banerjee ◽

Pawan Kapur

Keyword(s):

Performance Analysis

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Wiring layer assignments with consistent stage delays

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333041 ◽

2000 ◽

Author(s):

Andrew B. Kahng ◽

Dirk Stroobandt

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Energy efficient high-speed on-chip signaling in deep-submicron CMOS technology

Proceedings of the 2000 international workshop on System-level interconnect prediction - SLIP '00 ◽

10.1145/333032.333035 ◽

2000 ◽

Author(s):

Imed Ben Dhaou ◽

Hannu Tenhunen

Keyword(s):

Energy Efficient ◽

Cmos Technology ◽

Deep Submicron ◽

Submicron Cmos ◽

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