Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science

2011 ◽

pp. 22-31 ◽

Cited By ~ 3

Author(s):

Andrea Bartolini ◽

MohammadSadegh Sadri ◽

Francesco Beneventi ◽

Matteo Cacciari ◽

Andrea Tilli ◽

...

Keyword(s):

System Level ◽

Thermal Sensors

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Chip Level Statistical Leakage Power Estimation Using Generalized Extreme Value Distribution

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_18 ◽

2011 ◽

pp. 173-179 ◽

Cited By ~ 1

Author(s):

Alireza Khosropour ◽

Hossein Aghababa ◽

Ali Afzali-Kusha ◽

Behjat Forouzandeh

Keyword(s):

Extreme Value Distribution ◽

Power Estimation ◽

Extreme Value ◽

Leakage Power ◽

Value Distribution ◽

Generalized Extreme Value Distribution ◽

Generalized Extreme Value

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Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_22 ◽

2011 ◽

pp. 214-225

Author(s):

Karthikeyan Lingasubramanian ◽

Andrea Calimera ◽

Alberto Macii ◽

Enrico Macii ◽

Massimo Poncino

Keyword(s):

Power Gating ◽

Clock Gating

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Pass Transistor Operation Modeling for Nanoscale Technologies

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_6 ◽

2011 ◽

pp. 53-62 ◽

Cited By ~ 2

Author(s):

Panagiotis Chaourani ◽

Ilias Pappas ◽

Spiros Nikolaidis ◽

Abdoul Rjoub

Keyword(s):

Pass Transistor

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Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_11 ◽

2011 ◽

pp. 102-111 ◽

Cited By ~ 15

Author(s):

Ahmed Yasir Dogan ◽

David Atienza ◽

Andreas Burg ◽

Igor Loi ◽

Luca Benini

Keyword(s):

Signal Processing ◽

Biomedical Signal Processing ◽

Power Performance ◽

Biomedical Signal ◽

Multi Core Processor

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Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_28 ◽

2011 ◽

pp. 278-287 ◽

Cited By ~ 3

Author(s):

Amir-Mohammad Rahmani ◽

Kameswar Rao Vaddina ◽

Pasi Liljeberg ◽

Juha Plosila ◽

Hannu Tenhunen

Keyword(s):

Networks On Chip ◽

Area Optimization ◽

On Chip ◽

3D Networks

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Power Profiling-Guided Floorplanner for Thermal Optimization in 3D Multiprocessor Architectures

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_2 ◽

2011 ◽

pp. 11-21 ◽

Cited By ~ 3

Author(s):

Ignacio Arnaldo ◽

José L. Risco-Martín ◽

José L. Ayala ◽

J. Ignacio Hidalgo

Keyword(s):

Thermal Optimization ◽

Multiprocessor Architectures ◽

Power Profiling

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High Level Synthesis of Asynchronous Circuits from Data Flow Graphs

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_32 ◽

2011 ◽

pp. 317-330

Author(s):

Rene van Leuken ◽

Tom van Leeuwen ◽

Huib Lincklaen Arriens

Keyword(s):

Data Flow ◽

Asynchronous Circuits ◽

High Level Synthesis ◽

Data Flow Graphs ◽

High Level ◽

Flow Graphs

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Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_9 ◽

2011 ◽

pp. 83-91 ◽

Cited By ~ 5

Author(s):

Gregory Di Pendina ◽

Kholdoun Torki ◽

Guillaume Prenat ◽

Yoann Guillemenet ◽

Lionel Torres

Keyword(s):

Low Power ◽

Digital Circuits ◽

Flip Flop ◽

Hybrid Cmos

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A Framework for Architecture-Level Exploration of 3-D FPGA Platforms

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science ◽

10.1007/978-3-642-24154-3_30 ◽

2011 ◽

pp. 298-307

Author(s):

Harry Sidiropoulos ◽

Kostas Siozios ◽

Dimitrios Soudris

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

A System Level Approach to Multi-core Thermal Sensors Calibration

Chip Level Statistical Leakage Power Estimation Using Generalized Extreme Value Distribution

Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating

Pass Transistor Operation Modeling for Nanoscale Technologies

Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing

Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels

Power Profiling-Guided Floorplanner for Thermal Optimization in 3D Multiprocessor Architectures

High Level Synthesis of Asynchronous Circuits from Data Flow Graphs

Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology

A Framework for Architecture-Level Exploration of 3-D FPGA Platforms

Export Citation Format

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer ScienceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

A System Level Approach to Multi-core Thermal Sensors Calibration

Chip Level Statistical Leakage Power Estimation Using Generalized Extreme Value Distribution

Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating

Pass Transistor Operation Modeling for Nanoscale Technologies

Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing

Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels

Power Profiling-Guided Floorplanner for Thermal Optimization in 3D Multiprocessor Architectures

High Level Synthesis of Asynchronous Circuits from Data Flow Graphs

Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology

A Framework for Architecture-Level Exploration of 3-D FPGA Platforms

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - Lecture Notes in Computer Science
Latest Publications