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1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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TOTAL DOCUMENTS
38
(FIVE YEARS 0)
H-INDEX
6
(FIVE YEARS 0)
Published By IEEE Comput. Soc
0818681683
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Most Cited Documents
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On-line error detection for finite field multipliers
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
◽
10.1109/dftvs.1997.628338
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2002
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Cited By ~ 2
Author(s):
M. Gossel
◽
S. Fenn
◽
D. Taylor
Keyword(s):
Finite Field
◽
Error Detection
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On Line
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A cost model for VLSI/MCM systems
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628320
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2002
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Author(s):
M. Kafrouni
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C. Thibeault
◽
Y. Savaria
Keyword(s):
Cost Model
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Generation and verification of tests for analogue circuits subject to process parameter deviations
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
◽
10.1109/dftvs.1997.628315
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2002
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Cited By ~ 11
Author(s):
S.J. Spinks
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C.D. Chalk
◽
I.M. Bell
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M. Zwolinski
Keyword(s):
Process Parameter
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Analogue Circuits
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Application of a yield model merging critical areas and defectivity to industrial products
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628304
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2002
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Cited By ~ 7
Author(s):
S. Levasseur
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F. Duvivier
Keyword(s):
Industrial Products
◽
Yield Model
◽
Critical Areas
◽
Model Merging
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Fast error-correcting Newton-Raphson dividers using time shared TMR
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628331
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2002
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Cited By ~ 2
Author(s):
W.L. Gallagher
◽
E.E. Swartzlander
Keyword(s):
Newton Raphson
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Concurrent testing of VLSI digital signal processors using mutation based testing
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
◽
10.1109/dftvs.1997.628314
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2002
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Author(s):
C. Aktouf
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G. Al-Hayek
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C. Robach
Keyword(s):
Digital Signal
◽
Digital Signal Processors
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Concurrent Testing
◽
Signal Processors
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Design of encoders and self-testing checkers for some systematic unidirectional error detecting codes
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
◽
10.1109/dftvs.1997.628317
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2002
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Cited By ~ 7
Author(s):
S.J. Piestrak
Keyword(s):
Self Testing
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Unidirectional Error
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Error Detecting
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Design of compact and high speed totally self-checking CMOS checkers for m-out-of-n codes
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628318
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2002
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Cited By ~ 1
Author(s):
X. Kavousianis
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D. Nikolos
◽
G. Sidiropoulos
Keyword(s):
High Speed
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Fault-tolerant hierarchical interconnection networks constructed by additional bypass linking with graph-node coloring
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628329
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2002
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Cited By ~ 1
Author(s):
N. Tsuda
Keyword(s):
Interconnection Networks
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Fault Tolerant
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Graph Node
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Compact and low power on-line self-testing voting scheme
1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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10.1109/dftvs.1997.628319
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2002
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Cited By ~ 5
Author(s):
C. Metra
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M. Favalli
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B. Ricco
Keyword(s):
Low Power
◽
Self Testing
◽
On Line
◽
Voting Scheme
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