2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)
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9781538613566

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Gate Metal Work Function Engineering for the Improvement of Electrostatic Behaviour of Doped Tunnel Field Effect Transistor

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.47 ◽

2017 ◽

Cited By ~ 2

Author(s):

Deepak Soni ◽

Dheeraj Sharma ◽

Shivendra Yadav ◽

Mohd. Aslam ◽

Dharmendra Singh Yadav ◽

...

Keyword(s):

Work Function ◽

Field Effect ◽

Field Effect Transistor ◽

Metal Work Function ◽

Effect Transistor ◽

Tunnel Field Effect Transistor ◽

Metal Work

Routing Algorithm for Application-Specific Network-on-Chip with Irregular Core Sizes

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.21 ◽

2017 ◽

Author(s):

Grandhi Sai Anirudh ◽

J. Soumya

Keyword(s):

Routing Algorithm ◽

Network On Chip ◽

On Chip ◽

Application Specific

MSM: Performance Enhancing Area and Congestion Aware Network-on-Chip Architecture

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.61 ◽

2017 ◽

Author(s):

Tuhin Subhra Das ◽

Prasun Ghosal

Keyword(s):

Network On Chip ◽

On Chip ◽

Congestion Aware ◽

Performance Enhancing

Keynotes [3 abstracts]

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.64 ◽

2017 ◽

Reliability and Threat Analysis of NBTI Stress on DSP Cores

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.12 ◽

2017 ◽

Author(s):

Anirban Sengupta ◽

Deepak Kachave ◽

Shuba Neema ◽

Sri Harsha Panugothu

Keyword(s):

Threat Analysis

Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.53 ◽

2017 ◽

Cited By ~ 2

Author(s):

Alak Majumder ◽

Pritam Bhattacharjee

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Current Profile ◽

Supply Noise

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.4 ◽

2017 ◽

Implementation of a 6 GHz MEMS Switch

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.25 ◽

2017 ◽

Author(s):

Saurabh Chaturvedi ◽

Mladen Bozanic ◽

Saurabh Sinha

Keyword(s):

Mems Switch

A Novel Intrusion Detection Algorithm: An AODV Routing Protocol Case Study

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.32 ◽

2017 ◽

Cited By ~ 3

Author(s):

Gurveen Vaseer ◽

Garima Ghai ◽

Pushpinder Singh Patheja

Keyword(s):

Intrusion Detection ◽

Routing Protocol ◽

Detection Algorithm ◽

Aodv Routing Protocol

Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2017.49 ◽

2017 ◽

Cited By ~ 2

Author(s):

Syed Samsuz Zaman ◽

Pankaj Kumar ◽

Manash Pratim Sarma ◽

Ashok Ray ◽

Gaurav Trivedi

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Gate Metal Work Function Engineering for the Improvement of Electrostatic Behaviour of Doped Tunnel Field Effect Transistor

Routing Algorithm for Application-Specific Network-on-Chip with Irregular Core Sizes

MSM: Performance Enhancing Area and Congestion Aware Network-on-Chip Architecture

Keynotes [3 abstracts]

Reliability and Threat Analysis of NBTI Stress on DSP Cores

Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip

Table of contents

Implementation of a 6 GHz MEMS Switch

A Novel Intrusion Detection Algorithm: An AODV Routing Protocol Case Study

Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications

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2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Gate Metal Work Function Engineering for the Improvement of Electrostatic Behaviour of Doped Tunnel Field Effect Transistor

Routing Algorithm for Application-Specific Network-on-Chip with Irregular Core Sizes

MSM: Performance Enhancing Area and Congestion Aware Network-on-Chip Architecture

Keynotes [3 abstracts]

Reliability and Threat Analysis of NBTI Stress on DSP Cores

Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip

Table of contents

Implementation of a 6 GHz MEMS Switch

A Novel Intrusion Detection Algorithm: An AODV Routing Protocol Case Study

Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)
Latest Publications