Gate Metal Work Function Engineering for the Improvement of Electrostatic Behaviour of Doped Tunnel Field Effect Transistor

Author(s):  
Deepak Soni ◽  
Dheeraj Sharma ◽  
Shivendra Yadav ◽  
Mohd. Aslam ◽  
Dharmendra Singh Yadav ◽  
...  

Tunnel Field Effect Transistor (TFET) is gated reverse biased P-I-N diode structured semiconductor device and can be considered as a reliable low power device. TCAD (Sentaurus 2D) simulations for various Gate metal work function (4.1-4.3 eV) shows that its ON-current (ION) arises from quantum mechanical band-to-band tunneling (B2BT) and observed that threshold Voltage (VT) for TFET decreases with increase in Gate metal work function. The thermionic emission of electrons in MOSFET limits the sub-threshold swing (SS) by 60 mV/dec whereas TFET has potential for low SS ie. SS<60 mV/dec. TCAD Simulations confirmed that that the Gate – Drain capacitance (Cgd) strongly follows the Gate capacitance (Cgg) all over the voltage range (0-0.9V) which increases the miller capacitance for TFET. It is investigated that for TFET, the injection of carriers into the channel is through B2BT which effectively couples the Gate charge to the Drain. A look up table based Verilog-A model is generated for TFET and used to simulate the static and dynamic behavior of TFET based digital circuit in Cadence spectre. Miller effect causes the peak voltage overshoots are noticed at the drain side during transient responses and can be responsible for dynamic power loss and high turn ON/OFF delay


2020 ◽  
Vol 67 (9) ◽  
pp. 3745-3752
Author(s):  
Xianglong Li ◽  
Yabin Sun ◽  
Ziyu Liu ◽  
Xiaojin Li ◽  
Yanling Shi ◽  
...  

Micromachines ◽  
2020 ◽  
Vol 11 (8) ◽  
pp. 780
Author(s):  
Jang Hyun Kim ◽  
Hyun Woo Kim ◽  
Young Suh Song ◽  
Sangwan Kim ◽  
Garam Kim

In this paper, an investigation is performed to analyze the L-shaped tunnel field-effect transistor (TFET) depending on a gate work function variation (WFV) with help of technology computer-aided design (TCAD) simulation. Depending on the gate voltage, the three variations occur in transfer curves. The first one is the on-state current (ION) variation, the second one is the hump current (IHUMP) variation, and the last one is ambipolar current (IAMB) variation. According to the simulation results, the ION variation is sensitive depending on the size of the tunneling region and could be reduced by increasing the tunneling region. However, the IHUMP and IAMB variations are relatively irrelevant to the size of the tunneling region. In order to analyze the cause of this difference, we investigated the band-to-band tunneling (BTBT) rate according to WFV cases. The results show that when ION is formed in L-shaped TFET, the BTBT rate relies on the WFV in the whole region of the gate because the tunnel barrier is formed in the entire area where the source and the gate meet. On the other hand, when the IHUMP and IAMB are formed in L-shaped TFET, the BTBT rate relies on the WFV in the edge of the gate.


2021 ◽  
Vol MA2021-02 (12) ◽  
pp. 622-622
Author(s):  
Ji-Hun Kim ◽  
Min-Won Kim ◽  
Sang-Dong Yoo ◽  
Tae-Hun Shim ◽  
Jin-Pyo Hong ◽  
...  

Author(s):  
Firas Natheer Abdul-kadir ◽  
Faris Hassan Taha

The aim of the proposed paper is an analytical model and realization of the characteristics for tunnel field-effect transistor (TFET) based on charge plasma (CP). One of the most applications of the TFET device which operates based on CP technique is the biosensor. CP-TFET is to be used as an effective device to detect the uncharged molecules of the bio-sample solution. Charge plasma is one of some techniques that recently invited to induce charge carriers inside the devices. In this proposed paper we use a high work function in the source (ϕ=5.93 eV) to induce hole charges and we use a lower work function in drain (ϕ=3.90 eV) to induce electron charges. Many electrical characterizations in this paper are considered to study the performance of this device like a current drain (ID) versus voltage gate (Vgs), ION/IOFF ratio, threshold voltage (VT) transconductance (gm), and sub-threshold swing (SS). The signification of this paper comes into view enhancement the performance of the device. Results show that high dielectric (K=12), oxide thickness (Tox=1 nm), channel length (Lch=42 nm), and higher work function for the gate (ϕ=4.5 eV) tend to best charge plasma silicon tunnel field-effect transistor characterization.


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