scholarly journals Versatile Thin‐Film Transistor with Independent Control of Charge Injection and Transport for Mixed Signal and Analog Computation

2020 ◽  
pp. 2000199
Author(s):  
Eva Bestelink ◽  
Olivier de Sagazan ◽  
Lea Motte ◽  
Max Bateson ◽  
Benedikt Schultes ◽  
...  
2017 ◽  
Vol 67 (1) ◽  
pp. 24-29
Author(s):  
YeongHun JEONG ◽  
Hyeonwook JANG ◽  
Hyeji HAN ◽  
Sunghoon JEON ◽  
Shant ARAKELYAN ◽  
...  

2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
P. T. Tue ◽  
T. Miyasako ◽  
E. Tokumitsu ◽  
T. Shimoda

We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT) which uses solution-processed indium-tin-oxide (ITO) and lead-zirconium-titanate (PZT) film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1) a reduction of the charge injection and (2) an increase of effective coercive voltage dropped on the insulator.


2010 ◽  
Vol 97 (19) ◽  
pp. 193504 ◽  
Author(s):  
Dae Woong Kwon ◽  
Jang Hyun Kim ◽  
Ji Soo Chang ◽  
Sang Wan Kim ◽  
Min-Chul Sun ◽  
...  

2018 ◽  
Vol 19 (1) ◽  
pp. 45-51 ◽  
Author(s):  
KwangHyun Choi ◽  
YoungHa Sohn ◽  
GeumJu Moon ◽  
YongSang Kim ◽  
Jae-Hong Jeon ◽  
...  

1994 ◽  
Vol 336 ◽  
Author(s):  
R. Carluccio ◽  
A. Pecora ◽  
D. Massimiani ◽  
G. Fortunato

ABSTRACTThe effects of bias-stressing n- and p-channel thin-film transistors, employing thermal silicon dioxide as gate insulator, have been analysed by using different techniques, including field-effect, space-charge photomodulation and photo-induced discharge. Photo-induced discharge experiments have pointed out as parasitic resistance effects can be present in p-channel devices. In order to reduce this problem, thin active layer p-channel devices have been fabricated and, combining these results to those relative to the n-channel transistors, we deduced a predominance of charge injection at low and moderate stress-biases while at high-stress biases modifications in the density of states take place.


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