A reversible ALU using HNG and Ferdkin gates in QCA nanotechnology

2020 ◽  
Vol 48 (8) ◽  
pp. 1291-1303 ◽  
Author(s):  
Maliheh Norouzi ◽  
Saeed Rasouli Heikalabad ◽  
Fereshteh Salimzadeh
Keyword(s):  
Reversible Alu

Designing a new reversible ALU by QCA for reducing occupation area

2019 ◽  
Vol 75 (8) ◽  
pp. 5118-5144 ◽  
Author(s):  
Saeed Mirzajani Oskouei ◽  
Ali Ghaffari
Keyword(s):  
Reversible Alu

QCA multiplexer based design of reversible ALU

2012 ◽  
Author(s):  
Bibhash Sen ◽  
Manojit Dutta ◽  
Dipak K Singh ◽  
Divyam Saran ◽  
Biplab K Sikdar
Keyword(s):  
Reversible Alu

Efficient design of reversible alu in quantum-dot cellular automata

Optik ◽  
2016 ◽  
Vol 127 (15) ◽  
pp. 6172-6182 ◽  
Author(s):  
Trailokya Nath Sasamal ◽  
Ashutosh Kumar Singh ◽  
Anand Mohan
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Efficient Design ◽  
Quantum Dot Cellular Automata ◽  
Reversible Alu

Approach to design a high performance fault-tolerant reversible ALU

2016 ◽  
Vol 2 (1) ◽  
pp. 83 ◽  
Author(s):  
Neeraj Kumar Misra ◽  
Subodh Wairya ◽  
Vinod Kumar Singh
Keyword(s):  
High Performance ◽  
Fault Tolerant ◽  
Reversible Alu

Design of a novel reversible ALU using an enhanced carry look- ahead adder

2011 ◽  
Author(s):  
Matthew Morrison ◽  
Matthew Lewandowski ◽  
Richard Meana ◽  
Nagarajan Ranganathan
Keyword(s):  
Look Ahead ◽  
Reversible Alu

scholarly journals A Novel VLSI Architecture for Reversible ALU Logic Gate Structure

2015 ◽  
Vol 120 (2) ◽  
pp. 1-3 ◽  
Author(s):  
Suman Yadav ◽  
Manish Saxena
Keyword(s):  
Logic Gate ◽  
Vlsi Architecture ◽  
Gate Structure ◽  
Reversible Alu

scholarly journals An Innovative Low Power Reversible ALU for Quantum Processor using QCA

2019 ◽  
Vol 8 (12) ◽  
pp. 2903-2908
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Reversible Logic ◽  
Heat Energy ◽  
Delay Analysis ◽  
Verilog Hdl ◽  
Basic Part ◽  
Quantum Processor ◽  
Cadence Tool ◽  
Reversible Alu

Landauer stated that “For irreversible computation each loss in information leads to loss of kTln2 joules of heat energy”. This has led to considerable interest in reversible logic. We know that ALU is the most basic part in any processor. Processor quality is determined based on its speed of operation. But, as the size of a processor decreases we face problems like power dissipation and greater delays. So, this paper presents an ALU implemented using reversible logic. This design is a simple way to reduce power dissipation and delay to a certain extent. Verilog HDL programming has been used to make this design. We have used XILINX and CADENCE tool to simulate this model and obtain power and delay analysis.

FPGA Implementation Of Dynamic Power, Area Optimized Reversible ALU For Various DSP Applications

2020 ◽  
Vol 24 ◽  
pp. 2044-2053
Author(s):  
Cissy Jose ◽  
T.D. Subash ◽  
Simi P. Thomas
Keyword(s):  
Fpga Implementation ◽  
Dynamic Power ◽  
Reversible Alu ◽  
Dsp Applications

scholarly journals Performance Analysis of a Universal Circuit for Reversible ALU using QCA & CMOS Technology

2018 ◽  
Vol 7 (4.38) ◽  
pp. 732
Author(s):  
Rajinder Tiwari ◽  
Anil Kumar ◽  
Preeta Shara
Keyword(s):  
Power Dissipation ◽  
Basic Feature ◽  
Cmos Technology ◽  
Reversible Logic ◽  
Low Energy ◽  
Input Terminal ◽  
Schematic Arrangement ◽  
Very High ◽  
Reliable Software ◽  
Reversible Alu

The reversible logic and gates are one of the promising and upcoming technologies which are capable of overcoming the limitations of the design and applications based on the CMOS technology. In this technology, the schematic arrangement of the device is implemented in such a way that every input terminal has been provided with individual output terminals. The author has used the technology which is based on quantum computations with a basic feature of loss of energy in small amount. It has many advantages like very high operating speed, low energy dissipation, and high device density. An adder/subtractor is heart of arithmetic units of processors i.e. acts as universal circuit for carrying out the mathematical computations in the quantum processors. The author has put forward a novel reversible adder/subtractor circuit using reversible logic & QCA. The QCA based circuit reported by the author has been compared and analyzed for the performance on the basis of number of gates, size, delay, power dissipation etc. The experimental work has been completed with the use of the most suitable and reliable software i.e. QCA and the performance of the proposed circuit has proven to be quite useful for this circuit to be used in some promising applications. These results are also compared with those obtained with the use of CMOS Technologies.  

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