Low Power Designs of XOR and XNOR Standard Cells

2011 International Conference in Electrics, Communication and Automatic Control Proceedings ◽

10.1007/978-1-4419-8849-2_120 ◽

2011 ◽

pp. 947-953

Author(s):

Jun Wang ◽

Jianping Hu

Keyword(s):

Low Power ◽

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A monotonic and low-power digitally controlled oscillator using standard cells for SoC applications

2012 4th Asia Symposium on Quality Electronic Design (ASQED) ◽

10.1109/acqed.2012.6320487 ◽

2012 ◽

Author(s):

Duo Sheng ◽

Ching-Che Chung ◽

Jhih-Ci Lan

Keyword(s):

Low Power ◽

Standard Cells ◽

Digitally Controlled ◽

Digitally Controlled Oscillator

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Design of Low-Power High-Performance FinFET Standard Cells

Circuits Systems and Signal Processing ◽

10.1007/s00034-017-0646-y ◽

2017 ◽

Vol 37 (5) ◽

pp. 1789-1806 ◽

Author(s):

Tian Wang ◽

Xiaoxin Cui ◽

Kai Liao ◽

Nan Liao ◽

Dunshan Yu ◽

...

Keyword(s):

Low Power ◽

High Performance ◽

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Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology

IEICE Transactions on Electronics ◽

10.1587/transele.e99.c.974 ◽

2016 ◽

Vol E99.C (8) ◽

pp. 974-983 ◽

Author(s):

Tian WANG ◽

Xiaoxin CUI ◽

Kai LIAO ◽

Nan LIAO ◽

Xiaole CUI ◽

...

Keyword(s):

Low Power ◽

High Performance ◽

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Low power aware standard cells using dual rail multi threshold null convention logic methodology

Microprocessors and Microsystems ◽

10.1016/j.micpro.2019.04.003 ◽

2019 ◽

Vol 68 ◽

pp. 28-33

Author(s):

M. Suresh ◽

A.K. Panda ◽

J. Sudhakar

Keyword(s):

Low Power ◽

Standard Cells ◽

Null Convention Logic

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Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells using Swarm Intelligence

2021 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas51556.2021.9401794 ◽

2021 ◽

Author(s):

Prasenjit Saha ◽

Salman Ahmed ◽

Hema Sai Kalluru ◽

Zia Abbas

Keyword(s):

Low Power ◽

Swarm Intelligence ◽

Approximate Design ◽

Standard Cells ◽

Transistor Sizing ◽

Design Generation

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Ultra-Low-Power and Performance-Improved Logic Circuit Using Hybrid TFET-MOSFET Standard Cells Topologies and Optimized Digital Front-End Process

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2020.3043585 ◽

2020 ◽

pp. 1-11

Author(s):

Zhixuan Wang ◽

Le Ye ◽

Qianqian Huang ◽

Kaixuan Du ◽

Zhichao Tan ◽

...

Keyword(s):

Low Power ◽

Logic Circuit ◽

Ultra Low Power ◽

Standard Cells ◽

Front End ◽

And Performance

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Sizing and optimization of low power process variation aware standard cells

2013 IEEE International Integrated Reliability Workshop Final Report ◽

10.1109/iirw.2013.6804189 ◽

2013 ◽

Author(s):

Zia Abbas ◽

Usman Khalid ◽

Mauro Olivieri

Keyword(s):

Low Power ◽

Process Variation ◽

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Reliability evaluation of high-performance, low-power FinFET standard cells based on mixed RBB/FBB technique

Journal of Semiconductors ◽

10.1088/1674-4926/38/4/044005 ◽

2017 ◽

Vol 38 (4) ◽

pp. 044005 ◽

Author(s):

Tian Wang ◽

Xiaoxin Cui ◽

Yewen Ni ◽

Kai Liao ◽

Nan Liao ◽

...

Keyword(s):

Low Power ◽

High Performance ◽

Reliability Evaluation ◽

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Design of standard cells used in low-power ASIC's exploiting the multiple-supply-voltage scheme

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) ◽

10.1109/asic.1998.722815 ◽

2002 ◽

Author(s):

Jinn-Shyan Wang ◽

Shang-Jyh Shieh ◽

J.-C. Wang ◽

C.-W. Yeh

Keyword(s):

Low Power ◽

Supply Voltage ◽

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A low-power sub-nanosecond standard-cells based adder

10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 ◽

10.1109/icecs.2003.1302035 ◽

2004 ◽

Author(s):

S. Perri ◽

P. Corsonello ◽

G. Staino

Keyword(s):

Low Power ◽

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