Placement and Global Routing of Standard Cell Integrated Circuits

Author(s):  
Carl Sechen
2019 ◽  
Vol 142 (6) ◽  
Author(s):  
Haiguang Liao ◽  
Wentai Zhang ◽  
Xuliang Dong ◽  
Barnabas Poczos ◽  
Kenji Shimada ◽  
...  

Abstract Global routing has been a historically challenging problem in the electronic circuit design, where the challenge is to connect a large and arbitrary number of circuit components with wires without violating the design rules for the printed circuit boards or integrated circuits. Similar routing problems also exist in the design of complex hydraulic systems, pipe systems, and logistic networks. Existing solutions typically consist of greedy algorithms and hard-coded heuristics. As such, existing approaches suffer from a lack of model flexibility and usually fail to solve sub-problems conjointly. As an alternative approach, this work presents a deep reinforcement learning method for solving the global routing problem in a simulated environment. At the heart of the proposed method is deep reinforcement learning that enables an agent to produce a policy for routing based on the variety of problems, and it is presented with leveraging the conjoint optimization mechanism of deep reinforcement learning. Conjoint optimization mechanism is explained and demonstrated in detail; the best network structure and the parameters of the learned model are explored. Based on the fine-tuned model, routing solutions and rewards are presented and analyzed. The results indicate that the approach can outperform the benchmark method of a sequential A* method, suggesting a promising potential for deep reinforcement learning for global routing and other routing or path planning problems in general. Another major contribution of this work is the development of a global routing problem sets generator with the ability to generate parameterized global routing problem sets with different size and constraints, enabling evaluation of different routing algorithms and the generation of training datasets for future data-driven routing approaches.


Integration ◽  
2001 ◽  
Vol 31 (1) ◽  
pp. 1-49 ◽  
Author(s):  
Jiang Hu ◽  
Sachin S. Sapatnekar

2021 ◽  
Vol 9 ◽  
pp. 103-108
Author(s):  
Meenakshi Agarwalla ◽  
Manash Pratim Sarma ◽  
Kandarpa Kumar Sarma

o keep pace with the design requirements of Integrated Circuits (ICs), parallel processing is adopted. The path to be routed between two nodes may or may not be dependent on the previously routed paths. The solution requires careful attention in distributing the nets to be routed to different processors. Previous work on allocating the tasks to processors has been quite successful, reporting upto 3x improvement on 4 cores and 5x improvement on 8 core machine. The advantage of increasing the number of cores diminishes with each added processor and the challenge lies in being able to maintain the improvement per added core. The existing techniques of distributing the nets cannot provide additional advantage of using more than 8 cores. This paper improves the work on parallelizing global routing using a technique of balancing the load on the processors for better utilization of the resources. A relatively new budding platform Julia has been used which provides the ease of programming while maintaining the performance of the C language. Technique used in this paper has enabled to use 16 cores with routing solutions obtained in 0.8 minutes achieving 12.5 times speedup compared to sequential processing on a single core


Author(s):  
Tetsushi Koide ◽  
Takeshi Suzuki ◽  
Shin'Ichi Wakabayashi ◽  
Noriyoshi Yoshida

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