Power-Efficient Fault-Tolerant Finite Field Multiplier

2013 ◽  
pp. 269-306
Author(s):  
Jimson Mathew ◽  
A. M. Jabir ◽  
R. A. Shafik ◽  
D. K. Pradhan
Keyword(s):  
Finite Field ◽  
Fault Tolerant ◽  
Power Efficient ◽  
Finite Field Multiplier

Fault Tolerant Techniques for Finite Field Multipliers

2014 ◽  
Vol 573 ◽  
pp. 209-214
Author(s):  
B. Sargunam ◽  
R. Dhanasekaran
Keyword(s):  
Finite Field ◽  
Error Detection ◽  
Fault Tolerant ◽  
High Reliability ◽  
Concurrent Error Detection ◽  
Polynomial Representation ◽  
Finite Field Multiplier ◽  
On Line ◽  
Error Detecting ◽  
Modular Redundancy

The use of finite field multipliers in the critical applications like elliptic curve cryptography needs Concurrent Error Detection (CED) and correction at architectural level to provide high reliability. This paper discusses fault tolerant technique for polynomial representation based finite field multipliers. The detection and correction are done on-line. We use a combination of Double Modular Redundancy (DMR) and Concurrent Error Detection (CED) techniques. The fault tolerant finite field multiplier is coded in VHDL and simulated using Modelsim. Further, the proposed multiplier with fault tolerant capability is synthesized and results are analyzed with respect to area occupied, input and output pin counts and delay. Our technique, when compared with existing techniques, gives better performance. We show that our concurrent error detecting multiplier over GF(2m) requires less than 200% extra hardware, whereas with the traditional fault tolerant techniques, such as Triple Modular Redundancy (TMR), overhead is more than 200%.

Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic

2018 ◽  
Vol 26 (11) ◽  
pp. 2542-2552
Author(s):  
Parham Hosseinzadeh Namin ◽  
Crystal Roma ◽  
Roberto Muscedere ◽  
Majid Ahmadi
Keyword(s):  
Finite Field ◽  
Normal Basis ◽  
Vlsi Implementation ◽  
Domino Logic ◽  
Finite Field Multiplier

Fault tolerant bit parallel finite field multipliers using LDPC codes

2008 ◽  
Author(s):  
J. Mathew ◽  
J. Singh ◽  
A. M. Jabir ◽  
M. Hosseinabady ◽  
D. K. Pradhan
Keyword(s):  
Finite Field ◽  
Fault Tolerant ◽  
Ldpc Codes
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