Design for Testability of SFQ Circuits

Mapping Intimacies ◽

10.1007/978-3-030-76885-0_16 ◽

2021 ◽

pp. 209-221

Author(s):

Gleb Krylov ◽

Eby G. Friedman

Keyword(s):

Design For Testability

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LOW POWER DESIGN FOR TESTABILITY IMPLEMENTATION FOR ASYNCHRONOUS FIFO

i-manager’s Journal on Electronics Engineering ◽

10.26634/jele.9.2.15142 ◽

2019 ◽

Vol 9 (2) ◽

pp. 24

Author(s):

KUMAR PATNALA MADHU ◽

R. NAGENDRA ◽

◽

Keyword(s):

Low Power ◽

Low Power Design ◽

Design For Testability

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Survey of software design for testability

Journal of Computer Applications ◽

10.3724/sp.j.1087.2008.02915 ◽

2009 ◽

Vol 28 (11) ◽

pp. 2915-2918 ◽

Author(s):

Jian-ping FU ◽

Min-yan LU

Keyword(s):

Software Design ◽

Design For Testability

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Differential BiCMOS logic circuits: fault characterization and design-for-testability

Microelectronics Reliability ◽

10.1016/s0026-2714(97)87803-1 ◽

1997 ◽

Vol 37 (3) ◽

pp. 535-536

Keyword(s):

Design For Testability ◽

Logic Circuits ◽

Fault Characterization

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Design for Testability, Debug and Reliability

10.1007/978-3-030-69209-4 ◽

2021 ◽

Author(s):

Sebastian Huhn ◽

Rolf Drechsler

Keyword(s):

Design For Testability

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Design for Testability of Low Dropout Regulators

2021 IEEE 39th VLSI Test Symposium (VTS) ◽

10.1109/vts50974.2021.9441007 ◽

2021 ◽

Author(s):

Anurag Tulsiram ◽

William R. Eisenstadt

Keyword(s):

Design For Testability ◽

Low Dropout Regulators

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Design for testability in embedded software projects

2011 IEEE/AIAA 30th Digital Avionics Systems Conference ◽

10.1109/dasc.2011.6096129 ◽

2011 ◽

Author(s):

Gaurav Sahay

Keyword(s):

Embedded Software ◽

Design For Testability ◽

Software Projects

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Test generation, design-for-testability and built-in self-test for arithmetic units based on graph labeling

Journal of Electronic Testing ◽

10.1007/bf00135230 ◽

1991 ◽

Vol 2 (4) ◽

pp. 351-372 ◽

Author(s):

Abhijit Chatterjee ◽

Jacob A. Abraham

Keyword(s):

Test Generation ◽

Design For Testability ◽

Graph Labeling ◽

Self Test ◽

Arithmetic Units ◽

Built In Self Test

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A New Design-for-Testability Method Based on Thru-Testability

Journal of Electronic Testing ◽

10.1007/s10836-011-5241-8 ◽

2011 ◽

Vol 27 (5) ◽

pp. 583-598

Author(s):

Chia Yee Ooi ◽

Hideo Fujiwara

Keyword(s):

Design For Testability

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Non-scan design for testability based on fault oriented conflict analysis

Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02). ◽

10.1109/ats.2002.1181691 ◽

2003 ◽

Author(s):

Dong Xiang ◽

Shan Gu ◽

Hideo Fujiwara

Keyword(s):

Design For Testability ◽

Conflict Analysis ◽

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Implementation of hierarchical design for testability methodology

2009 9th International Conference on Electronic Measurement & Instruments ◽

10.1109/icemi.2009.5274852 ◽

2009 ◽

Author(s):

Zhang Yansheng ◽

Chen Jianhui ◽

Jin Jianhui

Keyword(s):

Design For Testability ◽

Hierarchical Design

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