Code Synthesis for Timed Automata: A Comparison Using Case Study

2010 ◽  
pp. 403-403 ◽  
Author(s):  
Anaheed Ayoub ◽  
Ayman Wahba ◽  
Ashraf Salem ◽  
Mohamed Sheirah
Keyword(s):  
Timed Automata

Mapping OWL-S Process Model to Timed Automata

2018 ◽  
Vol 11 (1) ◽  
pp. 29-48
Author(s):  
Amel Boumaza ◽  
Ramdane Maamri
Keyword(s):  
Web Services ◽  
Process Model ◽  
Timed Automata ◽  
Automatic Verification ◽  
Covering Problems ◽  
Field Verification ◽  
Starting Point ◽  
Quantitative Properties ◽  
Time Systems

The conversion of web services to semantic web comes the opportunity to automate various tasks. OWL-S plays a key role in describing web services behaviour. While ontology-based semantics given to OWL-S is structural rather than behaviourally oriented, we cannot automate an essential task in this field, verification. In this article, the mapping of OWL-S process model to Timed automata is investigated, which is a suitable formalism for real time systems modeling and automatic verification. Hence, this has led to not only enabling automatic verification but also covering problems related to automated verification of temporal quantitative properties as bounded liveness property. As a starting point, the OWL-S and sub entry of time ontologies for describing the timed behaviour of services has been chosen. A defined set of mapping rules is used to automatically encode control constructs defined in OWL-S and temporal information into timed automata. Also, it is shown how a Uppaal checker is used to check required properties formulated in TCTL. Finally, an EClinic case study is used to illustrate the technique.

Timed-automata based schedulability analysis for distributed firm real-time systems: a case study

2012 ◽  
Vol 15 (3) ◽  
pp. 211-228 ◽  
Author(s):  
Thi Thieu Hoa Le ◽  
Luigi Palopoli ◽  
Roberto Passerone ◽  
Yusi Ramadian
Keyword(s):  
Real Time ◽  
Timed Automata ◽  
Schedulability Analysis ◽  
Real Time Systems ◽  
Time Systems

Analysis of Timed Automata Model-based Testing Approaches and Case Study

2015 ◽  
Vol 21 (2) ◽  
pp. 132-137
Author(s):  
Hanseok Kim ◽  
Eunkyoung Jee ◽  
Doo-Hwan Bae
Keyword(s):  
Timed Automata ◽  
Model Based ◽  
Model Based Testing

scholarly journals PROGRAMMING AUTONOMOUS BEHAVIOR OF REACTIVE METERING SYSTEMS BY TIMED AUTOMATA

2017 ◽  
pp. 18-26
Author(s):  
Lukáš Krejčí
Keyword(s):  
Timed Automata ◽  
Innovative Approach ◽  
Modeling Language ◽  
Network Data ◽  
Event Monitoring ◽  
Basic Principles ◽  
Autonomous Behavior ◽  
Systems Simulation ◽  
Execution Order

The paper presents a new, innovative approach of programming of autonomous behavior of reactive metering systems. The presented method is based on safely timed automata defined by UPPAAL team. This modeling language is extended with event monitoring, utility functions for asynchronous operations invocation and supervising capabilities. Additionally, appropriate metering operations querying principle for metering systems is proposed. Finally, a new method of timed automata systems simulation is presented. This method is based on the principle of random interleaving of automata execution order and probabilities balancing in order to ensure fairness of automata execution. Advantages of presented methods as well as their basic principles are summarized and demonstrated on a case study of AMM network data concentrator. On this case study, it is shown, that proposed methods allow to effortlessly define the autonomous behavior of a data concentrator in the understandable and easily modifiable way, thus they lack major disadvantages of the currently used approach.

scholarly journals Learning Nondeterministic Real-Time Automata

2021 ◽  
Vol 20 (5s) ◽  
pp. 1-26
Author(s):  
Jie An ◽  
Bohua Zhan ◽  
Naijun Zhan ◽  
Miaomiao Zhang
Keyword(s):  
Active Learning ◽  
Integrated Circuits ◽  
Real Time ◽  
Learning Algorithm ◽  
Timed Automata ◽  
Finite Automata ◽  
Special Kind ◽  
Learning Problem ◽  
Equivalence Queries

We present an active learning algorithm named NRTALearning for nondeterministic real-time automata (NRTAs). Real-time automata (RTAs) are a subclass of timed automata with only one clock which resets at each transition. First, we prove the corresponding Myhill-Nerode theorem for real-time languages. Then we show that there exists a unique minimal deterministic real-time automaton (DRTA) recognizing a given real-time language, but the same does not hold for NRTAs. We thus define a special kind of NRTAs, named residual real-time automata (RRTAs), and prove that there exists a minimal RRTA to recognize any given real-time language. This transforms the learning problem of NRTAs to the learning problem of RRTAs. After describing the learning algorithm in detail, we prove its correctness and polynomial complexity. In addition, based on the corresponding Myhill-Nerode theorem, we extend the existing active learning algorithm NL* for nondeterministic finite automata to learn RRTAs. We evaluate and compare the two algorithms on two benchmarks consisting of randomly generated NRTAs and rational regular expressions. The results show that NRTALearning generally performs fewer membership queries and more equivalence queries than the extended NL* algorithm, and the learnt NRTAs have much fewer locations than the corresponding minimal DRTAs. We also conduct a case study using a model of scheduling of final testing of integrated circuits.

scholarly journals On Memory-Block Traversal Problems in Model Checking Timed Systems

2000 ◽  
Vol 7 (3) ◽  
Author(s):  
Fredrik Larsson ◽  
Paul Pettersson ◽  
Wang Yi
Keyword(s):  
Model Checking ◽  
State Space ◽  
Operating Systems ◽  
Memory Management ◽  
Timed Automata ◽  
Model Checker ◽  
Timed Systems ◽  
Memory Block ◽  
Start Up

A major problem in model-checking timed systems is the<br />huge memory requirement. In this paper, we study the memory-block<br />traversal problems of using standard operating systems in exploring the<br />state-space of timed automata. We report a case study which demonstrates<br />that deallocating memory blocks (i.e. memory-block traversal)<br />using standard memory management routines is extremely time-consuming.<br />The phenomenon is demonstrated in a number of experiments by<br />installing the Uppaal tool on Windows95, SunOS 5 and Linux. It seems<br />that the problem should be solved by implementing a memory manager<br />for the model-checker, which is a troublesome task as it is involved in<br />the underlining hardware and operating system. We present an alternative<br />technique that allows the model-checker to control the memory-block<br />traversal strategies of the operating systems without implementing<br />an independent memory manager. The technique is implemented in the<br />Uppaal model-checker. Our experiments demonstrate that it results in<br />significant improvement on the performance of Uppaal. For example, it<br />reduces the memory deallocation time in checking a start-up synchronisation<br />protocol on Linux from 7 days to about 1 hour. We show that the<br />technique can also be applied in speeding up re-traversals of explored<br />state-space.

Verification of Flexray Start-Up Mechanism by Timed Automata

2010 ◽  
Vol 17 (3) ◽  
pp. 461-480 ◽  
Author(s):  
Jan Malinský ◽  
Jiří Novák
Keyword(s):  
Discrete Event Systems ◽  
Timed Automata ◽  
Discrete Event ◽  
Software Tool ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Event Systems ◽  
Start Up ◽  
Time Parameters

Verification of Flexray Start-Up Mechanism by Timed AutomataThis contribution deals with the modelling of a selected part of a new automotive communication standard called FlexRay. In particular, it focuses on the mechanism ensuring the start-up of a FlexRay network. The model has been created with the use of timed automata and verified. For this purpose the UPPAAL software tool has been used that allows the modelling of discrete event systems with the use of timed automata, and subsequently the verification of the model with the use of suitable queries compiled in the so called computation tree logic. This model can be used to look for incorrect settings of time parameters of communication nodes in the network that prevent network start-up and subsequently the start of the car. The existence of this model also opens the way for finding possible errors in the standard. On the basis of the model, the work gives a case study of the start-up mechanism behaviour verification in a FlexRay network consisting of three communication nodes.

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