Using Xilinx System Generator for Real Time Hardware Co-simulation of Video Processing System

Author(s):  
Taoufik Saidani ◽  
Mohamed Atri ◽  
Dhaha Dia ◽  
Rached Tourki
2002 ◽  
Author(s):  
Wei Liu ◽  
Zeying Chi ◽  
Wenjian Chen

Author(s):  
L. Merah ◽  
◽  
P. Lorenz ◽  
A. Ali-Pacha ◽  
N. Hadj-Said ◽  
...  

The enormous progress in communication technology has led to a tremendous need to provide an ideal environment for the transmission, storing, and processing of digital multimedia content, where the audio signal takes the lion's share of it. Audio processing covers many diverse fields, its main aim is presenting sound to human listeners. Recently, digital audio processing became an active research area, it covers everything from theory to practice in relation to transmission, compression, filtering, and adding special effects to an audio signal. The aim of this work is to present the real-time implementation steps of some audio effects namely, the echo and Flanger effects on Field Programmable Gate Array (FPGA). Today, FPGAs are the best choice in data processing because they provide more flexibility, performance, and huge processing capabilities with great power efficiency. Designs are achieved using the XSG tool (Xilinx System Generator), which makes complex designs easier without prior knowledge of hardware description languages. The paper is presented as a guide with deep technical details about designing and real-time implementation steps. We decided to transfer some experience to designers who want to rapidly prototype their ideas using tools such as XSG. All the designs have been simulated and verified under Simulink/Matlab environment, then exported to Xilinx ISE (Integrated Synthesis Environment) tool for the rest of the implementation steps. The paper also gives an idea of interfacing the FPGA with the LM4550 AC’97 codec using VHDL coding. The ATLYS development board based on Xilinx Spartan-6 LX45 FPGA is used for the real-time implementation.


2014 ◽  
Vol 1061-1062 ◽  
pp. 1186-1189
Author(s):  
Ming Zhe Wei ◽  
Wan Wei Tang

With the rapid development of aerial UAV (Unmanned Aerial Vehicle), the design of real-time data acquisition and transmission system for the video signal has a new applied field. It is different from traditional video acquisition and processing system, aerial video signal has the problems of screen jitter and spatial interference. The processing algorithm of aerial UAV airborne video signal is put forward in the paper, and the platform of high speed procession is constructed based on chip TMS320DM642, and get a good effect.


2021 ◽  
Author(s):  
Gvarami Labartkava

Human vision is a complex system which involves processing frames and retrieving information in a real-time with optimization of the memory, energy and computational resources usage. It can be widely utilized in many real-world applications from security systems to space missions. The research investigates fundamental principles of human vision and accordingly develops a FPGA-based video processing system with binocular vision, capable of high performance and real-time tracking of moving objects in 3D space. The undertaken research and implementation consist of: 1. Analysis of concepts and methods of human vision system; 2. Development stereo and peripheral vision prototype of a system-on-programmable chip (SoPC) for multi-object motion detection and tracking; 3. Verification, test run and analysis of the experimental results gained on the prototype and associated with the performance constraints; The implemented system proposes a platform for real-time applications which are limited in current approaches.


2021 ◽  
Author(s):  
Wagner I. Penny ◽  
Daniel M. Palomino ◽  
Marcelo S. Porto ◽  
Bruno Zatt

This work presents an energy-efficient NoC-based system for real-time multimedia applications employing approximate computing. The proposed video processing system, called SApp-NoC, is efficient in both energy and quality (QoS), employing a scalable NoC architecture composed of processing elements designed to accelerate the HEVC Fractional Motion Estimation (FME). Two solutions are proposed: HSApp-NoC (Heuristc-based SApp-NoC), and MLSApp-NoC (Machine Learning-based SApp-NoC). When compared to a precise solution processing 4K videos at 120 fps, HSApp-NoC and MLSApp-NoC reduce about 48.19% and 31.81% the energy consumption, at small quality reduction of 2.74% and 1.09%, respectively. Furthermore, a set of schedulability analysis is also proposed in order to guarantee the meeting of timing constraints at typical workload scenarios.


Author(s):  
Yahia Said ◽  
Taoufik Saidani ◽  
Fethi Smach ◽  
Mohamed Atri ◽  
Hichem Snoussi

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