Design and Implementation of High-Speed Low-Power Carry Select Adder

Mapping Intimacies ◽

10.1007/978-981-16-1056-1_41 ◽

2021 ◽

pp. 517-530

Author(s):

Kummetha Deepthi ◽

Pratheeksha Bhaskar ◽

M. Priyanka ◽

B. V. Sonika ◽

B. N. Shashikala

Keyword(s):

Low Power ◽

Design And Implementation ◽

Carry Select Adder

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Design and Implementation of High Speed and Low Power Modified Square Root Carry Select Adder (MSQRTCSLA)

Research Journal of Applied Sciences Engineering and Technology ◽

10.19026/rjaset.12.2302 ◽

2016 ◽

Vol 12 (1) ◽

pp. 43-51

Author(s):

C. Uthayakumar ◽

B. Justus Rabi

Keyword(s):

Low Power ◽

Square Root ◽

Design And Implementation ◽

Carry Select Adder

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Design and Implementation of 3-bit Flash Analog to Digital Converter for Low Power and High Speed Applications with New Ex-OR Based ROM Encoder

Lecture Notes in Electrical Engineering - Advances in Electrical and Computer Technologies ◽

10.1007/978-981-15-9019-1_53 ◽

2021 ◽

pp. 613-626

Author(s):

S. S. Kamate ◽

H. P. Rajani

Keyword(s):

Low Power ◽

Analog To Digital Converter ◽

Digital Converter ◽

Analog To Digital ◽

Design And Implementation

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Low Power and High Speed Dadda Multiplier using Carry Select Adder with Binary to Excess-1 Converter

2020 International Conference on Emerging Trends in Smart Technologies (ICETST) ◽

10.1109/icetst49965.2020.9080739 ◽

2020 ◽

Author(s):

Muteen Munawar ◽

Talha Khan ◽

Muhammad Rehman ◽

Zain Shabbir ◽

Kamran Daniel ◽

...

Keyword(s):

Low Power ◽

Carry Select Adder

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Design and Implementation of High-Speed Low Power Multipliers Using Reversible Logic

INTERNATIONAL JOURNAL OF EMERGING TRENDS IN SCIENCE AND TECHNOLOGY ◽

10.18535/ijetst/v3i05.05 ◽

2016 ◽

Author(s):

Koustuv Chakraborty ◽

Keyword(s):

Low Power ◽

Reversible Logic ◽

Design And Implementation

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Design and Implementation of FIR Filter using Low Power and High Speed Multiplier and Adders

CVR Journal of Science & Technology ◽

10.32377/cvrjst1722 ◽

2019 ◽

Vol 17 (1) ◽

pp. 127-131

Author(s):

O. Venkata Krishna ◽

Keyword(s):

Low Power ◽

Design And Implementation

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Low Power High Speed SQRT Carry Select Adder

IOSR Journal of VLSI and Signal processing ◽

10.9790/4200-0134651 ◽

2012 ◽

Vol 1 (3) ◽

pp. 46-51

Author(s):

Partha Mitra

Keyword(s):

Low Power ◽

Carry Select Adder

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Design and implementation of low power and high speed multiplier using quaternary carry look-ahead adder

Microprocessors and Microsystems ◽

10.1016/j.micpro.2020.103054 ◽

2020 ◽

Vol 75 ◽

pp. 103054

Author(s):

V. Muralidharan ◽

N. Sathish Kumar

Keyword(s):

Low Power ◽

Design And Implementation ◽

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Design And Implementation Of Low Power High Speed Flash ADC for UWB Applications

2017 14th IEEE India Council International Conference (INDICON) ◽

10.1109/indicon.2017.8487506 ◽

2017 ◽

Author(s):

Nishtha ◽

Navaid Zafar Rizvi

Keyword(s):

Low Power ◽

Flash Adc ◽

Design And Implementation ◽

Uwb Applications

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Design and Implementation of a Low-Power, High-Speed Comparator

Procedia Materials Science ◽

10.1016/j.mspro.2015.06.061 ◽

2015 ◽

Vol 10 ◽

pp. 314-322 ◽

Author(s):

V. Deepika ◽

Sangeeta Singh

Keyword(s):

Low Power ◽

Design And Implementation

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Design and implementation of a high speed low power 4-bit Flash ADC

2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era ◽

10.1109/dtis.2007.4449519 ◽

2007 ◽

Author(s):

K. A. Shehata ◽

H. F. Ragai ◽

H. Husien

Keyword(s):

Low Power ◽

Flash Adc ◽

Design And Implementation

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