Design of test pattern generator (TPG) by an optimized low power design for testability (DFT) for scan BIST circuits using transmission gates

2018 ◽  
Vol 22 (S6) ◽  
pp. 15231-15244 ◽  
Author(s):  
G. Naveen Balaji ◽  
S. Chenthur Pandian
Keyword(s):  
Low Power ◽  
Test Pattern ◽  
Low Power Design ◽  
Design For Testability ◽  
Pattern Generator ◽  
Transmission Gates

A Case Study: Low Power Design-for-Testability Features of a Multi-Core Processor Godson-T

2011 ◽  
Vol 301-303 ◽  
pp. 1237-1242
Author(s):  
Da Wang ◽  
Dong Rui Fan ◽  
Yu Hu
Keyword(s):  
Low Power ◽  
Modular Design ◽  
Multicore Processors ◽  
Low Power Design ◽  
Design For Testability ◽  
Deep Submicron ◽  
Pattern Generation ◽  
Test Time ◽  
Test Power ◽  
Multi Core Processor

This paper describes the low power test challenges and features of a multi-core processor, Godson-T, which contains 16 identical cores. Since the silicon design technology scales to ultra deep submicron and even nanometers, the complexity and cost of testing is growing up, and the test power of such designs is extremely curious, especially for multicore processors. In this paper, we use the modular design methodology and scaleable design-for-testability (DFT) structure to achieve low test power, at the same time, an improved test pattern generation method is studied to reduce test power further more. The experimental results from the real chip show that the test power and test time are well balanced while achieving acceptable test coverage and cost.

A Low Power Test Pattern Generator for BIST

2010 ◽  
Vol E93-C (5) ◽  
pp. 696-702 ◽  
Author(s):  
Shaochong LEI ◽  
Feng LIANG ◽  
Zeye LIU ◽  
Xiaoying WANG ◽  
Zhen WANG
Keyword(s):  
Low Power ◽  
Test Pattern ◽  
Pattern Generator ◽  
Power Test ◽  
Low Power Test

scholarly journals LPTest: a Flexible Low-Power Test Pattern Generator

2009 ◽  
Vol 25 (6) ◽  
pp. 323-335 ◽  
Author(s):  
Meng-Fan Wu ◽  
Kai-Shun Hu ◽  
Jiun-Lang Huang
Keyword(s):  
Low Power ◽  
Test Pattern ◽  
Pattern Generator ◽  
Power Test ◽  
Low Power Test

An improved low transition test pattern generator for low power applications

2017 ◽  
Vol 21 (3-4) ◽  
pp. 247-263 ◽  
Author(s):  
Govindaraj Vellingiri ◽  
Ramesh Jayabalan
Keyword(s):  
Low Power ◽  
Test Pattern ◽  
Pattern Generator
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