Low-power and variation-aware approximate arithmetic units for Image Processing Applications

AEU - International Journal of Electronics and Communications ◽

10.1016/j.aeue.2021.153825 ◽

2021 ◽

pp. 153825

Author(s):

Mohammad Mirzaei ◽

Siamak Mohammadi

Keyword(s):

Image Processing ◽

Low Power ◽

Arithmetic Units

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Low-power process-variation tolerant arithmetic units using input-based elastic clocking

Proceedings of the 2007 international symposium on Low power electronics and design - ISLPED '07 ◽

10.1145/1283780.1283797 ◽

2007 ◽

Author(s):

Debabrata Mohapatra ◽

Georgios Karakonstantis ◽

Kaushik Roy

Keyword(s):

Low Power ◽

Process Variation ◽

Arithmetic Units

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Low power DCT implementation using differential pixels for on-board satellite image processing

2007 6th International Conference on Information, Communications & Signal Processing ◽

10.1109/icics.2007.4449764 ◽

2007 ◽

Author(s):

Ankita Singla ◽

A. P. Vinod ◽

Deepu Rajan ◽

Edmund M-K. Lai

Keyword(s):

Image Processing ◽

Low Power ◽

Satellite Image ◽

Satellite Image Processing

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Low Power Image Processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration

2018 Conference on Design and Architectures for Signal and Image Processing (DASIP) ◽

10.1109/dasip.2018.8596910 ◽

2018 ◽

Author(s):

Ariel Podlubne ◽

Julian Haase ◽

Lester Kalms ◽

Gokhan Akgun ◽

Muhammad Ali ◽

...

Keyword(s):

Image Processing ◽

Low Power ◽

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Partial Reconfiguration ◽

Dynamic Voltage

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Low power image processing using MuCCRA-3: A Dynamically Reconfigurable Processor Array

2009 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2009.5377614 ◽

2009 ◽

Author(s):

Masayuki Kimura ◽

Yoshiki Saito ◽

Toru Sano ◽

Masaru Kato ◽

Vasutan Tunbunheng ◽

...

Keyword(s):

Image Processing ◽

Low Power ◽

Processor Array ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable

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Low-power approximate convolution computing unit with domain-wall motion based "spin-memristor" for image processing applications

Proceedings of the 53rd Annual Design Automation Conference on - DAC '16 ◽

10.1145/2897937.2898042 ◽

2016 ◽

Author(s):

Yong Shim ◽

Abhronil Sengupta ◽

Kaushik Roy

Keyword(s):

Image Processing ◽

Domain Wall ◽

Low Power ◽

Wall Motion ◽

Domain Wall Motion ◽

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Open Education Teaching Unit for Low-Power Design and FPGA Image Processing

2019 IEEE Frontiers in Education Conference (FIE) ◽

10.1109/fie43999.2019.9028694 ◽

2019 ◽

Author(s):

Marco Winzker ◽

Andrea Schwandt

Keyword(s):

Image Processing ◽

Low Power ◽

Low Power Design ◽

Open Education ◽

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Low Power Reconfiguration of Approximate Arithmetic Units Using Verilog HDL

International Journal of Hybrid Information Technology ◽

10.14257/ijhit.2016.9.9.16 ◽

2016 ◽

Vol 9 (9) ◽

pp. 165-176

Author(s):

Nithin Nagabasavanna ◽

Nagaraju Chowdaiah

Keyword(s):

Low Power ◽

Verilog Hdl ◽

Arithmetic Units

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Low-Power Enhanced Error-Tolerant Adder for Medical Image Processing Subsystems

Journal of Medical Imaging and Health Informatics ◽

10.1166/jmihi.2016.1825 ◽

2016 ◽

Vol 6 (6) ◽

pp. 1430-1434

Author(s):

C. G. Ravichandran ◽

S. Venkateshbabu

Keyword(s):

Image Processing ◽

Low Power ◽

Medical Image ◽

Medical Image Processing

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7MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293964 ◽

2015 ◽

Author(s):

Koichiro Masuyama ◽

Yu Fujita ◽

Hayate Okuhara ◽

Hideharu Amano

Keyword(s):

Image Processing ◽

Low Power ◽

Ultra Low Power

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Low Power Arithmetic Units for Video Processing Systems

2006 10th IEEE Singapore International Conference on Communication Systems ◽

10.1109/iccs.2006.301397 ◽

2006 ◽

Author(s):

Hau Ngo ◽

Vijayan Asari

Keyword(s):

Low Power ◽

Video Processing ◽

Arithmetic Units

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