2015 25th International Conference on Field Programmable Logic and Applications (FPL)
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100

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8

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Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293940 ◽

2015 ◽

Author(s):

Joao Andrade ◽

Nithin George ◽

Kimon Karras ◽

David Novo ◽

Vitor Silva ◽

...

Keyword(s):

High Throughput ◽

High Level Synthesis ◽

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Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7294013 ◽

2015 ◽

Author(s):

Yuan Xue ◽

Patrick Cronin ◽

Chengmo Yang ◽

Jingtong Hu

Keyword(s):

Fine Tuning ◽

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A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7294002 ◽

2015 ◽

Author(s):

Stefano Di Carlo ◽

Paolo Prinetto ◽

Pascal Trotta ◽

Jan Andersson

Keyword(s):

Open Source ◽

Partial Reconfiguration ◽

Dynamic Partial Reconfiguration

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A scalable FPGA architecture for nonnegative least squares problems

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293750 ◽

2015 ◽

Author(s):

Alric Althoff ◽

Ryan Kastner

Keyword(s):

Least Squares ◽

Least Squares Problems ◽

Nonnegative Least Squares ◽

Fpga Architecture

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7MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293964 ◽

2015 ◽

Author(s):

Koichiro Masuyama ◽

Yu Fujita ◽

Hayate Okuhara ◽

Hideharu Amano

Keyword(s):

Image Processing ◽

Low Power ◽

Ultra Low Power

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Energy optimization of FPGA-based stream-oriented computing with power gating

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293946 ◽

2015 ◽

Author(s):

Mohammad Hosseinabady ◽

Jose Luis Nunez-Yanez

Keyword(s):

Energy Optimization ◽

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A scalable pipelined architecture for biomimetic vision sensors

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293935 ◽

2015 ◽

Author(s):

Daniel Llamocca ◽

Brian K. Dean

Keyword(s):

Pipelined Architecture ◽

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Fast FPGA system for microarchitecture optimization on synthesizable modern processor design

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7294005 ◽

2015 ◽

Author(s):

Libo Huang ◽

Yongwen Wang ◽

Qiang Dou ◽

Chengyi Zhang ◽

Caixia Sun ◽

...

Keyword(s):

Processor Design

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Greedy approach based heuristics for partitioning SpMxV on FPGAs

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293988 ◽

2015 ◽

Author(s):

Jiasen Huang ◽

Weina Lu ◽

Junyan Ren

Keyword(s):

Greedy Approach

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rrBox: A remote dynamically reconfigurable network processing middlebox

2015 25th International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2015.7293971 ◽

2015 ◽

Author(s):

Tze Hon Tan ◽

Chia Yee Ooi ◽

M. N. Marsono

Keyword(s):

Dynamically Reconfigurable ◽

Network Processing

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