An Efficient High Speed and Low Power Voltage-Level Shifter

Author(s):  
Neda Rezaei ◽  
Mitra Mirhassani
Author(s):  
Lini Lee

This chapter describes three contemporary low power design approaches; a resistor-less bandgap reference circuit, a hybrid voltage level shifter with a diode connected NMOS and a modified dynamic comparator, each design with the objective to demonstrate the feasibility of contemporary approaches in achieving lower power VLSI design. All three designs are simulated in 0.18 µm CMOS technology using industrial simulation tool and the results are based on performance parameters defined in the chapter.


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