Dual-mechanism modelling of instability in nanocrystalline silicon thin film transistors under prolonged gate-bias stress

2018 ◽  
Vol 651 ◽  
pp. 145-150 ◽  
Author(s):  
Tamila Anutgan ◽  
Mustafa Anutgan ◽  
Ismail Atilgan
2017 ◽  
Vol 32 (2) ◽  
pp. 91-96
Author(s):  
张猛 ZHANG Meng ◽  
夏之荷 XIA Zhi-he ◽  
周玮 ZHOU Wei ◽  
陈荣盛 CHEN Rong-sheng ◽  
王文 WONG Man ◽  
...  

2011 ◽  
Vol 98 (12) ◽  
pp. 122101 ◽  
Author(s):  
Chia-Sheng Lin ◽  
Ying-Chung Chen ◽  
Ting-Chang Chang ◽  
Fu-Yen Jian ◽  
Hung-Wei Li ◽  
...  

2011 ◽  
Vol 1321 ◽  
Author(s):  
I-Chung Chiu ◽  
I-Chun Cheng ◽  
Jian Z. Chen ◽  
Jung-Jie Huang ◽  
Yung-Pei Chen

ABSTRACTStaggered bottom-gate hydrogenated nanocrystalline silicon (nc-Si:H) thin-film transistors (TFTs) were demonstrated on flexible colorless polyimide substrates. The dc and ac bias-stress stability of these TFTs were investigated with and without mechanical tensile stress applied in parallel to the current flow direction. The findings indicate that the threshold voltage shift caused by an ac gate-bias stress was smaller compared to that caused by a dc gate-bias stress. Frequency dependence of threshold voltage shift was pronounced in the negative gate-bias stress experiments. Compared to TFTs under pure electrical gate-bias stressing, the stability of the nc-Si:H TFTs degrades further when the mechanical tensile strain is applied together with an electrical gate-bias stress.


2020 ◽  
Vol 53 (40) ◽  
pp. 405104
Author(s):  
Hong-Yi Tu ◽  
Ting-Chang Chang ◽  
Yu-Ching Tsao ◽  
Mao-Chou Tai ◽  
Yu-Lin Tsai ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document