Edge effect aware low-power crosstalk avoidance technique for 3D integration

Integration ◽

10.1016/j.vlsi.2018.03.008 ◽

2019 ◽

Vol 69 ◽

pp. 98-110 ◽

Author(s):

Lennart Bamberg ◽

Amir Najafi ◽

Alberto Garcia-Ortiz

Keyword(s):

Low Power ◽

Edge Effect ◽

3D Integration ◽

Crosstalk Avoidance

Download Full-text

Edge effect aware crosstalk avoidance technique for 3D integration

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106994 ◽

2017 ◽

Author(s):

Lennart Bamberg ◽

Amir Najafi ◽

Alberto Garcia-Ortiz

Keyword(s):

Edge Effect ◽

3D Integration ◽

Crosstalk Avoidance

Download Full-text

A low power low area crosstalk avoidance logic for 45nm ASIC applications

2017 International Conference on Intelligent Computing and Control (I2C2) ◽

10.1109/i2c2.2017.8321826 ◽

2017 ◽

Author(s):

P. Sudhakara Rao ◽

Battari Obulesu

Keyword(s):

Low Power ◽

Low Area ◽

Crosstalk Avoidance

Download Full-text

Design and Implementation of Low-Power Memory-Less Crosstalk Avoidance Codes Using Bit-Stuffing Algorithms

Lecture Notes in Electrical Engineering - Microelectronics, Electromagnetics and Telecommunications ◽

10.1007/978-981-10-7329-8_10 ◽

2018 ◽

pp. 95-104

Author(s):

Battari Obulesu ◽

P. Sudhakara Rao

Keyword(s):

Low Power ◽

Design And Implementation ◽

Crosstalk Avoidance

Download Full-text

Thruchip interface (TCI) for 3D integration of low-power system

2010 International Electron Devices Meeting ◽

10.1109/iedm.2010.5703378 ◽

2010 ◽

Author(s):

Tadahiro Kuroda

Keyword(s):

Power System ◽

Low Power ◽

3D Integration ◽

Low Power System

Download Full-text

A code generation algorithm of crosstalk-avoidance code with memory for low-power on-chip bus

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) ◽

10.1109/vdat.2008.4542440 ◽

2008 ◽

Author(s):

Kuang-Chin Cheng ◽

Jing-Yang Jou

Keyword(s):

Low Power ◽

Code Generation ◽

Generation Algorithm ◽

On Chip ◽

With Memory ◽

Crosstalk Avoidance

Download Full-text

Optimal low-power coding for error correction and crosstalk avoidance in on-chip data buses

Designs Codes and Cryptography ◽

10.1007/s10623-015-0084-4 ◽

2015 ◽

Vol 77 (2-3) ◽

pp. 479-491 ◽

Author(s):

Yeow Meng Chee ◽

Charles J. Colbourn ◽

Alan Chi Hung Ling ◽

Hui Zhang ◽

Xiande Zhang

Keyword(s):

Low Power ◽

Error Correction ◽

Chip Data ◽

On Chip ◽

Crosstalk Avoidance

Download Full-text

3D integration of high mobility InGaAs nFETs and Ge pFETs for ultra low power and high performance CMOS

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2013.6716513 ◽

2013 ◽

Author(s):

T. Irisawa ◽

M. Oda ◽

Y. Kamimuta ◽

Y. Moriyama ◽

K. Ikeda ◽

...

Keyword(s):

Low Power ◽

High Performance ◽

High Mobility ◽

3D Integration ◽

Ultra Low Power

Download Full-text

Bumpless Build Cube (BBCube): High-Parallelism, High-Heat-Dissipation and Low-Power Stacked Memory Using Wafer-Level 3D Integration Process

2020 IEEE Symposium on VLSI Technology ◽

10.1109/vlsitechnology18217.2020.9265038 ◽

2020 ◽

Author(s):

Norio Chujo ◽

Koji Sakui ◽

Hiroyuki Ryoson ◽

Shinji Sugatani ◽

Tomoji Nakamura ◽

...

Keyword(s):

Low Power ◽

Heat Dissipation ◽

High Heat ◽

Integration Process ◽

Wafer Level ◽

3D Integration ◽

Download Full-text

Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems ◽

10.1109/apccas.2006.342072 ◽

2006 ◽

Author(s):

Qingli Zhang ◽

Jinxiang Wang ◽

Yizheng Ye

Keyword(s):

Low Power ◽

Chip Data ◽

On Chip ◽

Crosstalk Avoidance

Download Full-text

Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration

ACM Transactions on Design Automation of Electronic Systems ◽

10.1145/1870109.1870114 ◽

2010 ◽

Vol 16 (1) ◽

pp. 1-25 ◽

Author(s):

Thorlindur Thorolfsson ◽

Samson Melamed ◽

W. Rhett Davis ◽

Paul D. Franzon

Keyword(s):

Low Power ◽

Download Full-text