scholarly journals A GPU-Based Wide-Band Radio Spectrometer

2014 ◽  
Vol 31 ◽  
Author(s):  
Jayanth Chennamangalam ◽  
Simon Scott ◽  
Glenn Jones ◽  
Hong Chen ◽  
John Ford ◽  
...  
Keyword(s):  
Graphics Processing Units ◽  
High Performance ◽  
Graphics Processing Unit ◽  
Wide Band ◽  
Processing Unit ◽  
Astronomical Instrumentation ◽  
Online Data ◽  
Polyphase Filter ◽  
Polyphase Filter Bank ◽  
Graphics Processing

AbstractThe graphics processing unit has become an integral part of astronomical instrumentation, enabling high-performance online data reduction and accelerated online signal processing. In this paper, we describe a wide-band reconfigurable spectrometer built using an off-the-shelf graphics processing unit card. This spectrometer, when configured as a polyphase filter bank, supports a dual-polarisation bandwidth of up to 1.1 GHz (or a single-polarisation bandwidth of up to 2.2 GHz) on the latest generation of graphics processing units. On the other hand, when configured as a direct fast Fourier transform, the spectrometer supports a dual-polarisation bandwidth of up to 1.4 GHz (or a single-polarisation bandwidth of up to 2.8 GHz).

scholarly journals A lightweight approach to performance portability with targetDP

2016 ◽  
Vol 32 (2) ◽  
pp. 288-301
Author(s):  
Alan Gray ◽  
Kevin Stratford
Keyword(s):  
Particle Physics ◽  
Message Passing ◽  
Graphics Processing Units ◽  
High Performance ◽  
Large Scale ◽  
Message Passing Interface ◽  
Graphics Processing Unit ◽  
Processing Unit ◽  
Performance Portability ◽  
Graphics Processing

Leading high performance computing systems achieve their status through use of highly parallel devices such as NVIDIA graphics processing units or Intel Xeon Phi many-core CPUs. The concept of performance portability across such architectures, as well as traditional CPUs, is vital for the application programmer. In this paper we describe targetDP, a lightweight abstraction layer which allows grid-based applications to target data parallel hardware in a platform agnostic manner. We demonstrate the effectiveness of our pragmatic approach by presenting performance results for a complex fluid application (with which the model was co-designed), plus separate lattice quantum chromodynamics particle physics code. For each application, a single source code base is seen to achieve portable performance, as assessed within the context of the Roofline model. TargetDP can be combined with Message Passing Interface (MPI) to allow use on systems containing multiple nodes: we demonstrate this through provision of scaling results on traditional and graphics processing unit-accelerated large scale supercomputers.

Advanced Topics GPU Programming and CUDA Architecture

2016 ◽  
pp. 175-203
Author(s):  
Mainak Adhikari ◽  
Sukhendu Kar
Keyword(s):  
Graphics Processing Units ◽  
High Performance ◽  
Programming Model ◽  
Graphics Processing Unit ◽  
Direct Access ◽  
Gpu Programming ◽  
Processing Unit ◽  
Computing Platform ◽  
Cuda Architecture ◽  
Graphics Processing

Graphics processing unit (GPU), which typically handles computation only for computer graphics. Any GPU providing a functionally complete set of operations performed on arbitrary bits can compute any computable value. Additionally, the use of multiple graphics cards in one computer, or large numbers of graphics chips, further parallelizes the already parallel nature of graphics processing. CUDA (Compute Unified Device Architecture) is a parallel computing platform and programming model created by NVIDIA and implemented by the graphics processing units (GPUs). CUDA gives program developers direct access to the virtual instruction set and memory of the parallel computational elements in CUDA GPUs. This chapter first discuss some features and challenges of GPU programming and the effort to address some of the challenges with building and running GPU programming in high performance computing (HPC) environment. Finally this chapter point out the importance and standards of CUDA architecture.

scholarly journals Embedded GPU Implementation for High-Performance Ultrasound Imaging

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 884
Author(s):  
Stefano Rossi ◽  
Enrico Boni
Keyword(s):  
High Performance ◽  
Graphics Processing Unit ◽  
Digital Signal ◽  
Processing Unit ◽  
Embedded Computing ◽  
Field Programmable ◽  
Peripheral Component Interconnect ◽  
Programmable Gate Arrays ◽  
Graphics Processing ◽  
Signal Processors

Methods of increasing complexity are currently being proposed for ultrasound (US) echographic signal processing. Graphics Processing Unit (GPU) resources allowing massive exploitation of parallel computing are ideal candidates for these tasks. Many high-performance US instruments, including open scanners like ULA-OP 256, have an architecture based only on Field-Programmable Gate Arrays (FPGAs) and/or Digital Signal Processors (DSPs). This paper proposes the implementation of the embedded NVIDIA Jetson Xavier AGX module on board ULA-OP 256. The system architecture was revised to allow the introduction of a new Peripheral Component Interconnect Express (PCIe) communication channel, while maintaining backward compatibility with all other embedded computing resources already on board. Moreover, the Input/Output (I/O) peripherals of the module make the ultrasound system independent, freeing the user from the need to use an external controlling PC.

High-Performance, Graphics Processing Unit-Accelerated Fock Build Algorithm

2020 ◽  
Vol 16 (12) ◽  
pp. 7232-7238
Author(s):  
Giuseppe M. J. Barca ◽  
Jorge L. Galvez-Vallejo ◽  
David L. Poole ◽  
Alistair P. Rendell ◽  
Mark S. Gordon
Keyword(s):  
High Performance ◽  
Graphics Processing Unit ◽  
Processing Unit ◽  
Graphics Processing

scholarly journals Ballooning Graphics Memory Space in Full GPU Virtualization Environments

2019 ◽  
Vol 2019 ◽  
pp. 1-11
Author(s):  
Younghun Park ◽  
Minwoo Gu ◽  
Sungyong Park
Keyword(s):  
High Performance ◽  
Virtual Machines ◽  
Graphics Processing Unit ◽  
Performance Degradation ◽  
Processing Unit ◽  
Memory Space ◽  
Memory Size ◽  
Memory Sharing ◽  
Gpu Virtualization ◽  
Graphics Processing

Advances in virtualization technology have enabled multiple virtual machines (VMs) to share resources in a physical machine (PM). With the widespread use of graphics-intensive applications, such as two-dimensional (2D) or 3D rendering, many graphics processing unit (GPU) virtualization solutions have been proposed to provide high-performance GPU services in a virtualized environment. Although elasticity is one of the major benefits in this environment, the allocation of GPU memory is still static in the sense that after the GPU memory is allocated to a VM, it is not possible to change the memory size at runtime. This causes underutilization of GPU memory or performance degradation of a GPU application due to the lack of GPU memory when an application requires a large amount of GPU memory. In this paper, we propose a GPU memory ballooning solution called gBalloon that dynamically adjusts the GPU memory size at runtime according to the GPU memory requirement of each VM and the GPU memory sharing overhead. The gBalloon extends the GPU memory size of a VM by detecting performance degradation due to the lack of GPU memory. The gBalloon also reduces the GPU memory size when the overcommitted or underutilized GPU memory of a VM creates additional overhead for the GPU context switch or the CPU load due to GPU memory sharing among the VMs. We implemented the gBalloon by modifying the gVirt, a full GPU virtualization solution for Intel’s integrated GPUs. Benchmarking results show that the gBalloon dynamically adjusts the GPU memory size at runtime, which improves the performance by up to 8% against the gVirt with 384 MB of high global graphics memory and 32% against the gVirt with 1024 MB of high global graphics memory.

scholarly journals Splotch

2016 ◽  
Vol 31 (6) ◽  
pp. 550-563
Author(s):  
Timothy Dykes ◽  
Claudio Gheller ◽  
Marzia Rivi ◽  
Mel Krokos
Keyword(s):  
High Performance ◽  
Large Scale ◽  
Graphics Processing Unit ◽  
Processing Unit ◽  
Xeon Phi ◽  
The Many ◽  
Many Core ◽  
Performance Results ◽  
Graphics Processing ◽  
Performance Computing

With the increasing size and complexity of data produced by large-scale numerical simulations, it is of primary importance for scientists to be able to exploit all available hardware in heterogenous high-performance computing environments for increased throughput and efficiency. We focus on the porting and optimization of Splotch, a scalable visualization algorithm, to utilize the Xeon Phi, Intel’s coprocessor based upon the new many integrated core architecture. We discuss steps taken to offload data to the coprocessor and algorithmic modifications to aid faster processing on the many-core architecture and make use of the uniquely wide vector capabilities of the device, with accompanying performance results using multiple Xeon Phi. Finally we compare performance against results achieved with the Graphics Processing Unit (GPU) based implementation of Splotch.

scholarly journals Controllers: An abstraction to ease the use of hardware accelerators

2017 ◽  
Vol 32 (6) ◽  
pp. 838-853 ◽  
Author(s):  
Ana Moreton–Fernandez ◽  
Hector Ortega–Arranz ◽  
Arturo Gonzalez–Escribano
Keyword(s):  
Graphics Processing Units ◽  
High Performance ◽  
Abstract Entity ◽  
Hardware Accelerators ◽  
Processing Unit ◽  
Central Processing ◽  
Computing Platforms ◽  
Graphics Processing ◽  
Performance Computing ◽  
Selection Of

Nowadays the use of hardware accelerators, such as the graphics processing units or XeonPhi coprocessors, is key in solving computationally costly problems that require high performance computing. However, programming solutions for an efficient deployment for these kind of devices is a very complex task that relies on the manual management of memory transfers and configuration parameters. The programmer has to carry out a deep study of the particular data that needs to be computed at each moment, across different computing platforms, also considering architectural details. We introduce the controller concept as an abstract entity that allows the programmer to easily manage the communications and kernel launching details on hardware accelerators in a transparent way. This model also provides the possibility of defining and launching central processing unit kernels in multi-core processors with the same abstraction and methodology used for the accelerators. It internally combines different native programming models and technologies to exploit the potential of each kind of device. Additionally, the model also allows the programmer to simplify the proper selection of values for several configuration parameters that can be selected when a kernel is launched. This is done through a qualitative characterization process of the kernel code to be executed. Finally, we present the implementation of the controller model in a prototype library, together with its application in several case studies. Its use has led to reductions in the development and porting costs, with significantly low overheads in the execution times when compared to manually programmed and optimized solutions which directly use CUDA and OpenMP.

scholarly journals Graphics processing unit implementation of the F-statistic for continuous gravitational wave searches

2021 ◽  
Author(s):  
Liam Dunn ◽  
Patrick Clearwater ◽  
Andrew Melatos ◽  
Karl Wette
Keyword(s):  
Gravitational Wave ◽  
Graphics Processing Units ◽  
Graphics Processing Unit ◽  
Computational Cost ◽  
Processing Unit ◽  
Central Processing ◽  
Long Baseline ◽  
Using Data ◽  
Graphics Processing ◽  
Gpu Implementation

Abstract The F-statistic is a detection statistic used widely in searches for continuous gravitational waves with terrestrial, long-baseline interferometers. A new implementation of the F-statistic is presented which accelerates the existing "resampling" algorithm using graphics processing units (GPUs). The new implementation runs between 10 and 100 times faster than the existing implementation on central processing units without sacrificing numerical accuracy. The utility of the GPU implementation is demonstrated on a pilot narrowband search for four newly discovered millisecond pulsars in the globular cluster Omega Centauri using data from the second Laser Interferometer Gravitational-Wave Observatory observing run. The computational cost is 17:2 GPU-hours using the new implementation, compared to 1092 core-hours with the existing implementation.

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