A 3-bit load-pulling digital power amplifier

A radio frequency (RF) 3-bit digital power amplifier (DPA) is described in this paper. It consists of three RF amplifiers connected at their outputs with a transmission line (TL) network. The three amplifiers are designed for different output powers (POUT). The TL network allows them to load-pull one other to achieve eight different amplitude states by alternatively enabling and disabling the amplifiers via their gate bias. A prototype was designed in the National Instruments' Microwave Office (MWO) for 500 MHz with the aid of a genetic algorithm to optimize the TL network for all seven active (on-) states. The optimizer efficiencies goals were based on data derived from load-pull simulation. The POUT goals were based on a 1 Vrms step-size. In simulation, ≥50% efficiency was achieved at all on-states with 29.7 dBm peak POUT. A practical prototype based on the simulation achieved an efficiency of ≥40% over all seven on-states. A peak POUT of 28.9 dBm was achieved, with the lowest state at 22.4 dBm.