A Reconfigurable Hardware Architecture for Packet Processing

2018 ◽  
Vol 27 (2) ◽  
pp. 428-432
Author(s):  
Tong DUAN ◽  
Julong LAN ◽  
Yuxiang HU ◽  
Shiran LIU
Keyword(s):  
Reconfigurable Hardware ◽  
Hardware Architecture ◽  
Packet Processing ◽  
Reconfigurable Hardware Architecture

New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur)

2007 ◽  
Vol 49 (3) ◽  
Author(s):  
Alexander Thomas ◽  
Jürgen Becker
Keyword(s):  
Reconfigurable Hardware ◽  
Hardware Architecture ◽  
New Approach ◽  
Dynamic Function ◽  
Reconfigurable Hardware Architecture

A new dynamic reconfigurable hardware architecture, the HoneyComb, will be introduced that has been developed within the project AMURHA. New integrated features enhance the flexibility and usability of future array-based systems by exploring the new approach.

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