reconfigurable hardware architecture Latest Research Papers

Reinhardt: Real-time Reconfigurable Hardware Architecture for Regular Expression Matching in DPI

10.1145/3485832.3485878 ◽

2021 ◽

Author(s):

Taejune Park ◽

Jaehyun Nam ◽

Seung Ho Na ◽

Jaewoong Chung ◽

Seungwon Shin

Keyword(s):

Real Time ◽

Regular Expression ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Regular Expression Matching ◽

Reconfigurable Hardware Architecture

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Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator

2020 IEEE 9th Global Conference on Consumer Electronics (GCCE) ◽

10.1109/gcce50665.2020.9291854 ◽

2020 ◽

Author(s):

Chung-Bin Wu ◽

Ching-Shun Wang ◽

Yu-Kuan Hsiao

Keyword(s):

Deep Learning ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Architecture Design ◽

Design And Implementation ◽

Reconfigurable Hardware Architecture

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Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

International Journal of Vehicle Information and Communication Systems ◽

10.1504/ijvics.2020.10029202 ◽

2020 ◽

Vol 5 (1) ◽

pp. 11

Author(s):

K.R. Venugopal ◽

G. Leelavathi ◽

K. Shaila

Keyword(s):

Reconfigurable Hardware ◽

Hardware Architecture ◽

Sensor Nodes ◽

Public Key ◽

Wireless Sensor ◽

Wireless Sensor Nodes ◽

Reconfigurable Hardware Architecture

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SLIT: An Energy-Efficient Reconfigurable Hardware Architecture for Deep Convolutional Neural Networks

IEICE Transactions on Electronics ◽

10.1587/transele.2020cdp0002 ◽

2020 ◽

Author(s):

Thi DIEM TRAN ◽

Yasuhiko NAKASHIMA

Keyword(s):

Neural Networks ◽

Convolutional Neural Networks ◽

Energy Efficient ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Deep Convolutional Neural Networks ◽

Reconfigurable Hardware Architecture

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Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

International Journal of Vehicle Information and Communication Systems ◽

10.1504/ijvics.2020.107179 ◽

2020 ◽

Vol 5 (1) ◽

pp. 11

Author(s):

G. Leelavathi ◽

K. Shaila ◽

K.R. Venugopal

Keyword(s):

Reconfigurable Hardware ◽

Hardware Architecture ◽

Sensor Nodes ◽

Public Key ◽

Wireless Sensor ◽

Wireless Sensor Nodes ◽

Reconfigurable Hardware Architecture

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A Novel Reconfigurable Hardware Architecture of Neural Network

2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2019.8884809 ◽

2019 ◽

Cited By ~ 2

Author(s):

Kasem Khalil ◽

Omar Eldash ◽

Bappaditya Dey ◽

Ashok Kumar ◽

Magdy Bayoumi

Keyword(s):

Neural Network ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Reconfigurable Hardware Architecture

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Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations

IEICE Electronics Express ◽

10.1587/elex.16.20190584 ◽

2019 ◽

Vol 16 (21) ◽

pp. 20190584-20190584 ◽

Cited By ~ 1

Author(s):

Jiafei Zhao ◽

Rongkun Jiang ◽

Hao Yang ◽

Xuetian Wang ◽

Hongmin Gao

Keyword(s):

Reconfigurable Hardware ◽

Hardware Architecture ◽

Reconfigurable Hardware Architecture

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Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve

ACM Transactions on Reconfigurable Technology and Systems ◽

10.1145/3231743 ◽

2018 ◽

Vol 11 (2) ◽

pp. 1-19 ◽

Cited By ~ 2

Author(s):

N. Nalla Anandakumar ◽

M. Prem Laxman Das ◽

Somitra K. Sanadhya ◽

Mohammad S. Hashmi

Keyword(s):

Key Agreement ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Authenticated Key Agreement ◽

Key Agreement Protocol ◽

Edwards Curve ◽

Reconfigurable Hardware Architecture

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A Reconfigurable Hardware Architecture for Principal Component Analysis

Circuits Systems and Signal Processing ◽

10.1007/s00034-018-0953-y ◽

2018 ◽

Vol 38 (5) ◽

pp. 2097-2113 ◽

Cited By ~ 4

Author(s):

Uday A. Korat ◽

Amirhossein Alimohammad

Keyword(s):

Principal Component Analysis ◽

Principal Component ◽

Component Analysis ◽

Reconfigurable Hardware ◽

Hardware Architecture ◽

Reconfigurable Hardware Architecture

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A Reconfigurable Hardware Architecture for Packet Processing

Chinese Journal of Electronics ◽

10.1049/cje.2017.08.018 ◽

2018 ◽

Vol 27 (2) ◽

pp. 428-432

Author(s):

Tong DUAN ◽

Julong LAN ◽

Yuxiang HU ◽

Shiran LIU

Keyword(s):

Reconfigurable Hardware ◽

Hardware Architecture ◽

Packet Processing ◽

Reconfigurable Hardware Architecture

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reconfigurable hardware architecture
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Reinhardt: Real-time Reconfigurable Hardware Architecture for Regular Expression Matching in DPI

Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator

Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

SLIT: An Energy-Efficient Reconfigurable Hardware Architecture for Deep Convolutional Neural Networks

Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

A Novel Reconfigurable Hardware Architecture of Neural Network

Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations

Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve

A Reconfigurable Hardware Architecture for Principal Component Analysis

A Reconfigurable Hardware Architecture for Packet Processing

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reconfigurable hardware architectureRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Reinhardt: Real-time Reconfigurable Hardware Architecture for Regular Expression Matching in DPI

Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator

Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

SLIT: An Energy-Efficient Reconfigurable Hardware Architecture for Deep Convolutional Neural Networks

Reconfigurable hardware architecture of public key crypto processor for VANET and wireless sensor nodes

A Novel Reconfigurable Hardware Architecture of Neural Network

Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations

Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve

A Reconfigurable Hardware Architecture for Principal Component Analysis

A Reconfigurable Hardware Architecture for Packet Processing

reconfigurable hardware architecture
Recently Published Documents