Two novel inverter-based ternary full adder cells using CNFETs for energy-efficient applications

2019 ◽  
Vol 107 (1) ◽  
pp. 82-98 ◽  
Author(s):  
Iman Mahmoudi Salehabad ◽  
Keivan Navi ◽  
Mehdi Hosseinzadeh
Keyword(s):  
Energy Efficient ◽  
Full Adder ◽  
Ternary Full Adder

scholarly journals Spin Wave Based Full Adder

2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Sorin Cotofana ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Wall Motion ◽  
State Of The Art ◽  
Magnetic Tunnel Junction ◽  
Domain Wall Motion ◽  
Full Adder ◽  
Low Energy ◽  
Phase Detection ◽  
Micromagnetic Simulations ◽  
The Road

Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of The FA 1 Majority and 2 XOR gates, which outputs Sum and Carry-out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.

scholarly journals Spin Wave Based Approximate Computing

2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Said Hamdioui ◽  
...  
Keyword(s):  
Real Estate ◽  
Error Rate ◽  
Energy Efficient ◽  
State Of The Art ◽  
Magnetic Tunnel Junction ◽  
Domain Wall Motion ◽  
Full Adder ◽  
Average Error ◽  
Approximate Computing ◽  
Average Error Rate

By their very nature Spin Waves (SWs) enable the realization of energy efficient circuits as they propagate and interfere within waveguides without consuming noticeable energy. However, SW computing can be even more energy efficient by taking advantage of the approximate computing paradigm as many applications are error-tolerant like multimedia and social media. In this paper we propose an ultra-low energy novel Approximate Full Adder (AFA) and a 2-bit inputs Multiplier (AMUL). The approximate FA consists of one Majority gate while the approximate MUL is built by means of 3 AND gates. We validate the correct functionality of our proposal by means of micromagnetic simulations and evaluate the approximate FA figure of merit against state-of-the-art accurate SW, 7nm CMOS, Spin Hall Effect (SHE), Domain Wall Motion (DWM), accurate and approximate 45nm CMOS, Magnetic Tunnel Junction (MTJ), and Spin-CMOS FA implementations. Our results indicate that AFA consumes 43% and 33% less energy than state-of-the-art accurate SW and 7nm CMOS FA, respectively, and saves 69% and 44% when compared with accurate and approximate 45nm CMOS, respectively, and provides a 2 orders of magnitude energy reduction when compared with accurate SHE, accurate and approximate DWM, MTJ, and Spin-CMOS, counterparts. In addition, it achieves the same error rate as approximate 45nm CMOS and Spin-CMOS FA whereas it exhibits 50% less error rate than the approximate DWM FA. Furthermore, it outperforms its contenders in terms of area by saving at least 29% chip real-estate. AMUL is evaluated and compared with state-of-the-art accurate SW and 16nm CMOS accurate and approximate state-of-the-art designs. The evaluation results indicate that it saves at least 2x and 5x energy in comparison with the state-of-the-art SW designs and 16nm CMOS accurate and approximate designs, respectively, and has an average error rate of 10%, while the approximate CMOS MUL has an average error rate of 12.5%, and requires at least 64% less chip real-estate.

A Novel CNTFET-based Ternary Full Adder

2013 ◽  
Vol 33 (3) ◽  
pp. 665-679 ◽  
Author(s):  
Peiman Keshavarzian ◽  
Rahil Sarikhani
Keyword(s):  
Full Adder ◽  
Ternary Full Adder

scholarly journals Ternary Full Adder Using Multi-Threshold Voltage Graphene Barristors

2018 ◽  
Vol 39 (12) ◽  
pp. 1948-1951 ◽  
Author(s):  
Sunwoo Heo ◽  
Sunmean Kim ◽  
Kiyung Kim ◽  
Hyeji Lee ◽  
So-Young Kim ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Full Adder ◽  
Ternary Full Adder

Approximate Full Adders for Energy Efficient Image Processing Applications

2021 ◽  
pp. 2150235
Author(s):  
M. C. Parameshwara
Keyword(s):  
Energy Efficient ◽  
State Of The Art ◽  
Signal To Noise Ratio ◽  
Full Adder ◽  
Signal To Noise ◽  
Design Metrics ◽  
Standard Cell Library ◽  
Cell Library ◽  
Fair Comparison ◽  
Power Delay Product

This paper proposes six novel approximate 1-bit full adders (AFAs) for inexact computing. The six novel AFAs namely AFA1, AFA2, AFA3, AFA4, AFA5, and AFA6 are derived from state-of-the-art exact 1-bit full adder (EFA) architectures. The performance of these AFAs is compared with reported AFAs (RAAs) in terms of design metrics (DMs) and peak-signal-to-noise-ratio (PSNR). The DMs under consideration are power, delay, power-delay-product (PDP), energy-delay-product (EDP), and area. For a fair comparison, the EFAs and proposed AFAs along with RAAs are described in Verilog, simulated, and synthesized using Cadences’ RC tool, using generic 180 nm standard cell library. The unconstrained synthesis results show that: among all the proposed AFAs, the AFA1 and AFA2 are found to be energy-efficient adders with high PSNR. The AFA1 has a total [Formula: see text][Formula: see text][Formula: see text]W, [Formula: see text][Formula: see text]ps, [Formula: see text][Formula: see text]fJ, [Formula: see text][Formula: see text]Js, [Formula: see text][Formula: see text][Formula: see text]m2, and [Formula: see text][Formula: see text]dB. And the AFA2 has the total [Formula: see text][Formula: see text][Formula: see text]W, [Formula: see text][Formula: see text]ps, [Formula: see text][Formula: see text]fJ, [Formula: see text][Formula: see text]Js, [Formula: see text][Formula: see text][Formula: see text]m2, and [Formula: see text][Formula: see text]dB.

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