Two's-complement systolic array multiplier with applications to DSP hardware

1989 ◽  
Vol 66 (4) ◽  
pp. 507-518
Author(s):  
M. A. SID-AHMED
Keyword(s):  
Systolic Array ◽  
Array Multiplier

Bi-way sorter. a two-dimensional systolic array

1992 ◽  
Vol 139 (2) ◽  
pp. 147
Author(s):  
G.A. Orton ◽  
L.E. Peppard ◽  
S.G. Akl
Keyword(s):  
Systolic Array ◽  
Two Dimensional

HIGH SPEED AND LOW POWER 4*4 ARRAY MULTIPLIER DESIGN

2019 ◽  
Vol 7 (1) ◽  
pp. 24
Author(s):  
N. SURESH ◽  
K. S. SHAJI ◽  
KISHORE REDDY M. CHAITANYA ◽  
◽  
◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Array Multiplier

scholarly journals Test Architecture for Systolic Array of Edge-based AI Accelerator

IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Umair Saeed Solangi ◽  
Muhammad Ibtesam ◽  
Muhammad Adil Ansari ◽  
Jinuk Kim ◽  
Sungju Park
Keyword(s):  
Systolic Array ◽  
Edge Based ◽  
Test Architecture
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